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APRIL 1976 $1.50 (12 bits) 




the small systems journal 




WHY SETTLE FOR LESS— 
THAN A COMPLETE 6800 SYSTEM 



MEMORY- 

All static memory with selected 2102 IC's al- 
lows processor to run at its maximum 
speed at all times. No refresh system is 
needed and no time is lost in me- 
mory refresh cycles. Each board 
holds 4,096 words of this 
proven reliable and trouble 
free memory. Cost- 
only $125.00 for 
each full 4K 
memory. M 




INTERFACE- 

Serial control interface connects to any RS-232,"or 
20 Ma. TTY control terminal. Connectors pro- 
vided for expansion of up to eight interfaces. 
Unique programmable interface circuits 
allow you to match the interface to al- 
most any possible combination of 
polarity and control signal ar- 
rangements. Baud rate selec- 
tion can be made on each 
individual interface. All 
this at a sensible cost 
of only $35.00 for 
either serial, or 
parallel type 



PROCESSOR- 




"Motorola" M6800 processor 
with Mikbug® ROM operating 
system. Automatic reset and load- 
ing, plus full compatability with 
Motorola evaluation set software. Crystal 
controlled oscillator provides the clock signal 
for the processor and is divided down by the 
MC1441 1 to provide the various Baud rate outputs 
for the interface circuits. Full buffering on all data 
and address busses insures "glitch" free operation with 
full expansion of memory and interfaces. 



POWER 
SUPPLY- 

Heavy duty 10.0 Amp power 
supply capable of powering a 
fully expanded system of memory 
and interface boards. Note 25 Amp 
rectifier bridge and 91,000 mfd computer 
grade filter capacitor. 



DOCUMENTATION— 

Probably the most extensive and complete set of data available for any 
microprocessor system is supplied with our 6800 computer. This includes 
the Motorola programming manual, our own very complete assembly in- 
structions, plus a notebook full of information that we have compiled on 
the system hardware and programming. This includes diagnostic programs, 
sample programs and even a Tic Tac Toe listing. 



Mikbug^ is a registered trademark of 
Motorola Inc. 

Computer System 
with serial interface and 2,048 words 
of memory $395.00 




5Bifii 6800 bvst 6M 



□ Enclosed is $395 for my SwTPC Computer Kit □ Send Data 

□ or BAC # 

□ or MC Ex Date 



ADDRESS 



CITY STATE ZIP 

Southwest Technical Products Corp., Box 32040, San Antonio, Texas 78284 




J for sn authoritative 
microcomputer term ^ 







TITLE: Microcomputer Dictionary & Guide 
AUTHOR: Charles J. Sippl and David Kidd 

This new microcomputer dictionary fills the urgent need for all computer people, 
engineers, scientists, industrialists, communications people — as professionals, 
amateurs, teachers, or students — to become quickly acquainted with the 
terminology and nomenclature of a new revolution in computer control capa- 
bilities in areas that pervade most of man's daily activities. 

Over 8000 definitions and explanations of terms and concepts (704 pages) 
relating to microprocessors, microcomputers and microcontrollers. There are 
also separate appendices on: programmable calculators; math and statistics 
definitions, flowchart symbols and techniques; binary number systems and 
switching theory; symbol charts and tables; summaries of BASIC FORTRAN and 
APL. In addition there is a comprehensive electronics/computer abbreviations 
and acronyms section. Price: $17.95 




(A/so avaiiab 


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MATRIX PUBLISHERS, INC. 


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207 Kenyon Road, Champaign, IL 61820 




Please ser 


d me the new MICROCOMPUTER DICTIONARY under your \ \ 


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Curiosity, experimentation and 
imagination are great aids to the user 
of a computer system. Charles A 
Crayne describes two instruction set 
variations he found while Pro- 
gramming the Implementation of an 
8008 processor as a SCELBI 8H 
minicomputer. 

Can a computer predict your state 
of mind? A better question would be: 
Is there a theory which can be com- 
putationally verified to predict your 
state of mind? Biorhythm for Com- 
puters is an article by Joy and Richard 
Fox on the use of a BASIC calculation 
to provide predictions based upon the 
pseudo science of a simple biorhythm 
hypothesis. 

A key element of computing is the 
expression of ideas in the form of 
programs and algorithms. It takes the 
Magic of Languages to make such 
expressions in a form the computer 
can understand. Turn to Theodor 
Nelson's article for an introduction to 
some basic concepts of computer lan- 
guages. 

Ho hum, another memory article? 
Not quite. When Don Lancaster adds a 
twist of ingenuity, you find out How 
to Build a Memory With One Layer 
Printed Circuits, saving the trouble of 
using many wire jumpers or figuring 
out how to make double layer boards 
in the kitchen PC laboratory. 

Aargh! (or, How to Automate 
PROM Burning Without EML) was 
Peter Helmers' reaction to a suggestion 



In 
This 

HTE 



that relays be used to control a circuit. 
Study his figures for technical 
information and learn about the 
exciting new field of EML[sic] logic in 
the accompanying text. 

It could not take long to find 
another contender in the marketplace 
for compact computer systems. In this 
issue, J Bradley Flippin discusses The 
SR-52: Another "World's Smallest 
Computer System." 

Input is often done with a switch 
contact when simple on off states of 
electromechanical systems are con- 
sidered. But suppose you want to 
program stage lighting or drive a key- 
board machine with solenoids. Then 
you'll need information on Controlling 
External Devices with Hobbyist Com- 
puters. Robert J Bosen presents some 
ideas on the subject. 

Computers require a large dose of 
that arcane art, interfacing. Jay A 
Cotton shows one example of that art 
in his discussion of how to Interface 
an ASCII Keyboard to a 60 mA TTY 
Loop. 

Introspection is a prime technique 
for analyzing the human conscious- 
ness. Many parallels can be drawn 
between the design of complicated 
computer networks and knowledge of 
human mental functions. While not 
purporting to be a complete or final 
model of human mental functions, Joe 
Murray's article on Frankenstein 
Emulation provides some good inputs 
on the ultimate hobby: modeling 
human behavior. 



A Note on the Current BYTE 

Last month, the March issue of 
BYTE had a theme of magnetic 
recordings for digital data: four 
articles in that issue concerned various 
aspects of mass storage on the 
magnetic medium. This month, the 
theme is somewhat nebulous and is 
summed up by "April Fool!". The 
cover and several items in this issue are 
on a theme of far out applications and 
fun. I'll leave it to readers to figure out 
what items other than the cover fall 
into this category; however, all articles 
in this issue are instructive and 
informative, even those which are 
consistent with the theme. CH 



Minicomputers and micro- 
computers are really quite similar. The 
former are simply faster and more 
expensive than the current versions of 
the latter. Thus when you Design an 
On Line Debugger for a minicomputer, 
as Robert Wier and James Brown have 
done, the same general interactive 
design can be used as the control panel 
interface for any microcomputer as 
well. Add an on line debugger to your 
computer and you'll make it a much 
easier device to use. 

What's better than an 8 bit proces- 
sor in a 40 pin package? Why, a 16 bit 
processor in a 64 pin package, of 
course. In his Microprocessor Update: 
Texas Instruments TMS9900, Robert 
Baker provides readers with an over- 
view of this exciting new computer 
which is sure to find its way into 
personal computing systems over the 
next year or so. 

Ingenuity is an old American tradi- 
tion. Roger W Thompson makes his 
contribution to that tradition in his 
description of how to Save Money 
Using Mini Wire Wrap, a socketless 
penny pinching way of wiring inte- 
grated circuit projects. 

On the cover, at the suggestion of 
Tully Peschke, Robert Tinney created 
a fantasy on a theme of BYTE. First 
aid has already been applied and it is 
expected that the banner will be fixed 
in time for the May issue. 



In the Queue 



BITE #8 

APRIL 1976 

staff 



Foreground 



20 
28 
34 
42 
46 
56 
79 
80 



16 
24 
36 
50 
64 



BIORHYTHM FOR COMPUTERS 

Application — Fox-Fox 
HOW TO BUILD A MEMORY WITH ONE LAYER PRINTED CIRCUITS 

Hardware — Lancaster 
AARGH! (or, HOW TO AUTOMATE PROM BURNING WITHOUT EML) 

Hardware — P Helmers 
CONTROLLING EXTERNAL DEVICES WITH HOBBYIST COMPUTERS 

Hardware — Bosen 
INTERFACE AN ASCII KEYBOARD TO A 60 mA TTY LOOP 

Hardware — Cotton 
DESIGN AN ON LINE DEBUGGER 

Software — Wier-Brown 
IO STROBES FOR THE ALTAI R 8800 

Hardware — Schulein 
SAVE MONEY USING MINI WIRE WRAP 

Hardware — Thompson 



Background 



PROGRAMMING THE IMPLEMENTATION 

Software — Crayne 
THE MAGIC OF COMPUTER LANGUAGES 

Software — Nelson 
THE SR-52: ANOTHER WORLD'S SMALLEST 

Systems — Flippin 
FRANKENSTEIN EMULATION 

Speculations — Murray 
MICROPROCESSOR UPDATE: TEXAS INSTRUMENTS TMS9900 

Hardware — Baker 



PUBLISHERS 

Virginia Peschke 

Manfred Peschke 

EDITOR 

Carl T Helmers, Jr 

GENERAL MANAGER 

Manfred Peschke 

PRODUCTION MANAGER 

Judith Havey 

PRODUCTION ASSISTANT 

Elizabeth Alpaugh 

CIRCULATION 

Deborah R Luhrs 

PUBLISHERS ASSISTANTS 

Cheryl Hurd 

Carol Nyland 

Deena Zealy 

ADVERTISING 

Elizabeth Alpaugh 

Virginia Peschke 

TYPOGRAPHY 

Custom Marketing Resources, Inc 

Goodway Graphics 

Mary Lavoie 

Taimi Woodward 

PHOTOGRAPHY 

Ed Crabtree 

Custom Marketing Resources, Inc 

ART 

Bill Morello 

PRINTING 

Custom Marketing Resources, Inc 

The George Banta Company 

ASSOCIATES 

Dan Fylstra 

Don Lancaster 

Harold A Mauch 

Chris Ryland 



Nucleus 



2 


In This BYTE 


4 


Customization— The Expression of Individuality 


6 


Letters 


12 


Space Ace Revisited 


14, 18, 78 


What's New 


32, 77, 84 


BYTE's Bits 


55 


Technology Update 


74 


BYTE's Bugs 


74 


Classified Ads 


76 


Book Review 


90 


Clubs, Newsletters 


96 


BOMB 


96 


Reader's Service 



BYTE magazine is published 
monthly by BYTE Publica- 
tions, Inc , 70 Main St, Peter- 
borough, New Hampshire 
03458. Subscription rates are 
$12 for one year worldwide. 
Two years, $22. Three years. 
$30. Second class postage ap- 
plication pending at Peterbor- 
ough New Hampshire 03458 
and at additional mailing of- 
fices. Phone 603-924-7217. 
Entire contents copyright 
1976 BYTE Publications, Inc, 
Peterborough NH 03458. Ad- 
dress editorial correspondence 
to Editor, BYTE, 70 Main St, 
Peterborough NH 03458. 



Customization - 

The Expression of Individuality 



Editorial by Carl Helmers 



Each person who gets involved in this 
activity of acquiring and using a personal 
computer system will sooner or later 
appreciate the results of customization. Each 
computer system comes out differently 
according to the tastes and creativity of its 
owner (to say nothing of his or her 
pocketbook). The number "n" of choices 
available in creating a personal system is 
large, and is getting larger every day. 

Individuality of Systems 

Each personal computing system is an 
individual creation, despite the mass produc- 
tion genesis of all the parts and pieces. To 
understand this at a global level, simply 
consider the options available in the choice 
of standard microprocessor designs which 
make up the starting point for any system. 

At the present time, there are kits on the 
market for half a dozen or so different 
microcomputer designs. The first expression 
of individuality you have to make is in your 
choice of the microprocessor design for your 
system. Choosing one such processor puts 
you into a group of people employing the 
same instruction set, a group which can 
share software experiences directly. These 
users are distinguished from the logical 
grouping of users associated with the other 
microprocessor architectures. (Note that the 
"user groups" for personal computing are 
logically a result of CPU choice since all 
users of the same chip design share common 
problems independent of the means of 
wiring up and packaging the computer.) 

Having limited yourself to one particular 
microprocessor, the next level of exercising 
individuality in creating a system is your 
choice of a means to package and implement 
a processor using that CPU. Here again, the 
options are several. Some individuals "home 
brew" the packaging and system design with 
wire wrap or other interconnection tech- 
niques. Others elect to purchase a pre- 
engineered kit of parts from one of BYTE's 
advertisers. Whatever the choice of a basic 
system assembly with the processor, there 
are numerous system design options avail- 



able to you. How much memory? What type 
of interactive display terminal? Will the 
system use audio tape or will it have a 
floppy disk as mass store? Does the supplier 
have a BASIC package? Does the supplier 
make an assembler, monitor and text editor 
available? Assuming a particular set of 
answers to these questions, you will end up 
with a fairly unique system, but one possibly 
identical at the start to the systems of 
several other individuals who use the same 
kit maker. What is the final step in 
customization? 

Modularity and Software 

The customization of a system is ultimate- 
ly achieved through the variations in the 
optional hardware modules attached to it, 
and through the personal library of software 
built up by the system's owner and user. 

The customization of hardware starts in 
the choice of options available cither from 
the manufacturer of the kit or from 
independent suppliers. There is presently 
only one family of compatible peripherals, 
those employing the MITS Altair backplane 
interconnection conventions. (For the pres- 
ent time, in order to have the widest choice 
of prepackaged component kits an Altair 
compatible bus is virtually a necessity.) If 
you purchase an Altair incompatible system, 
it will prove helpful to home brew an Altair 
compatible bus extension for interfacing 
such peripherals; if you engineer a home 
brew system, such an extension is also 
useful. (That is one project in my queue for 
my own home brew 6800 system.) 

Once you have a basic system up and 
running, the customization of hardware 
continues in the choice of specific peripher- 
als for applications, and in the choice of add 
on memory and hardware to augment the 
system as you continue to use it. Custom 
peripherals are required wherever a process 
control or sensing application is involved. If 
the computer is to control a model railroad, 
for instance, you'll have to custom design 

continued on page 94 



Sphere Offers You 
A Real Computer! 



A REAL COMPUTER IS: 

1. A SYSTEM: One that begins at the beginning with an 
attractive chassis to put everything in and consists of: 

A. CPU— To give the greatest computing power for the 

lowest cost ever. Motorola 6800 Microprocessor. 
The most advanced microprocessor available 
today. 

1K PROM. ..The Computer Operating Program 
turns on instantly. 

4K RAM. ..For storage and operating capacity for 
many programs. 

REAL TIME CLOCK. ..To program and monitor 
events outside and inside the computer. 

B. CRT— To display in human language on video 

everything going on inside the computer. (512 
characters total in 16 lines by 32 characters.) 

C. KEYBOARD— So you can talk to your Computer 

as fast as you can type. (72 keys of alpha-numeric 
style typewriter keyboard.) 



2. AND A REAL COMPUTER ALLOWS YOU TO: Record 
and reload programs and data with inexpensive audio 
cassette recorder. 

D. SIM BOARD— So you can interface to teletype, 

audio cassette recorders and phone. (RS232c, 
TTL, TTY at 60ma and 20ma (Teletype), Modem, 
and 2 cassette recorders. 

3. A REAL COMPUTER ALLOWS YOU TO: Add more 
memory so you can do more processing and have more 
storage space. 

E. 1 6K MEM BOARD-About 20 pages of close type- 

written material (more memory up to 64K is 
available if needed.) 

4. A REAL COMPUTER ENDS UP BY ALLOWING YOU 

TO: Remember huge quantities of information, and then 
print it out on paper when you need reports, records, 
checks, P.O.s, Invoices, etc., etc., etc. 

F. PIM BOARD-To interface the computer with the 

line printer and floppy disk storage. 

G. FLOPPY DISK— To remember Vi million characters 

(about 150 pages of typed material) on line with 
the computer. 

H. LINE PRINTER-To print 65 lines per minute on 
8/2" wide paper up to 4 ledgible copies. 



THAT'S A COMPUTER!!!! 




Please Contact One Of Our Distributors- 
Computer Way— Huntington Beach, California 
Bargain Electronics— LaMeda, California 
Comput-O-Mat Systems— Rye, New York 
The Computer Workshop, Inc.— Montgomery County, 

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Computer Mart Corporated— Boston, Massachusetts 
The Computer Mart of New York— New York City, 

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Comunicacions S.A.— San Jose, Costa Rica 
Computer Country— Denver, Colorado 




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DELIVERY: 60-90 DAYS 




Letters 



STAR TREK AND 
SPACE WAR FORUM 

A number of readers 
have expressed interest in 
the use of personal com- 
puting equipment for 
STAR TREK and other 
space war games. Here is a 
collection of letters on the 
subjects. Continuation of 
the discussion and 
accounts of personal activ- 
ities in this area are 
encouraged. 



Members of the staff have 
been known to arrive at 
work two hours early in 
order to get their morning 
"fix." 



OREGON STATE FORTRAN 
STAR TREK 

In reply to the letters by Richard Wexler 
and Stewart Shelton regarding Star Trek and 
Spacewar, a version of Star Trek written in 
FORTRAN IV is currently being run on the 
CDC Cyber, under KRONOS 2.1, at the 
Oregon State University Computer Center, 
Corvallis OR 97331. The Spacewar to which 
Mr Shelton refers is, I believe, that which 
was publicized during the "National Space- 
war Competition." My source of info on this 
was the DEC EduGram . I don't have access 
to this any more, but I believe it was in a 
late 1971 or a 1972 issue that the game was 
first described. DEC (Maynard MA) may be 
able to tell you more about this particular 
version. I am familiar with at least three 
other Spacewar games and would like to 
hear from other Spacewar freaks about 
different versions they might know of. 

I've thoroughly enjoyed every issue of 
BYTE and can hardly wait for each new one. 
The only thing that bothers me is the lack of 
articles on programming theory. Will there 
be any sort of series covering such things as 
searching and sorting, parsing, tree struc- 
tures, etc.? 

Chip Weems 

728 Mildred Ln SE 

Salem OR 97302 



LARGE SCALE STAR TREK 

. . . There has been considerable dis- 
cussion of Star Trek (Spacewar) in the 
January issue. I'd like to pass on some 
information regarding the version of Star 
Trek we have currently running on a Data 
General Eclipse computer at work. 

The genesis of the FORTRAN IV Star 
Trek program we have is unknown. We got it 
from a friend who got it from a friend who 
.... As far as I could tell, the code was 
Xerox FORTRAN although I physically got 
it on mag tape from a Varian 620L The 
source code of the version we received was 
1800 statements. Some effort was required 
for program transition to DG FORTRAN. 
We also spent considerable time debugging 
and cleaning up the code. 

Our full program requires 25 K (16 bit 
words) of core for execution. We have 48 K 
of memory and operate background and 
foreground. Since the operating system 
(RDOS) takes about 16 K, any applications 
program over 16 K either steals the machine 
or severely limits the ability of the machine 
to support two users. (Particularly at lunch 
time when we make the machine available to 
computer games players.) Therefore, we 
broke the program into overlays to obtain a 
load module of 16 K. This works fine, but 
the disk sure rattles when torpedoes start 
flying. However, two players may play indi- 
vidual games at the same time. A further 
refinement was to compile the DG's 
FORTRAN 5 which significantly speeds 
execution and results in some saving of core 
(14 K). 

This version of Star Trek is quite com- 
plex, although versions for large machines 
are even more complex. The game randomly 
determines the number of Romulans and 
Klingons in the Unholy Alliance and gen- 
erates a reasonable number of Stardates in 
which to complete the mission. Automatic 
scoring of player proficiency is built in, 
along with appropriate insulting messages for 
those unfortunates who hit a star or meet 
their demise through other more sophis- 
ticated means. This game is not for the 
occasional player as a certain amount of skill 
is needed for full enjoyment. The program 
operates in simulated real time so the player 
with slow reactions is penalized. 

Star Trek is an extremely addictive com- 
puter game. Members of the staff have been 
known to arrive at work two hours early in 
order to get their morning "fix." While most 
people quickly learn how to beat the general 
simple computer game and become bored 
with that game, very few can beat Star Trek 
with any regularity. No players have been 



alphanumeric display 
generated with 
Dazzle-Writer software 
see below) 




Now your 

color TV can be your 

computer display terminal 



New capabilities, too 

Cromemco's new computer/tv interface 
circuit lets you have a full-color computer 
display terminal for little more than a 
black-and-white terminal. 

The Cromemco interface also lets you do 
vastly more with your color terminal than 
you can do with ordinary black-and-whites. 

We call our interface the TV Dazzler®. It 
consists of two circuit boards that plug 
directly into your Altair 8800 or IMSAI 
8080 computer. 

Alphanumerics plus action, and graphics 
The Dazzler® maps your computer 

memory content onto your color tv screen 

in full color. 

That doesn't mean just that you see 

alphanumerics in color. You can display any 

information in memory. And do so in color. 

LIFE in color 
You can display computer games or 
animated shows (rocket ships). What's more, 
you can display business or technical 
graphics — multi-colored charts, graphs, 
histograms, educational material — all from 
computer memory. Even light shows. Not 
even the biggest computer manufacturers 
offer all this in color. 




Needs only 2K memory 
Technically, the Dazzler® scans your 
computer memory using direct-memory 
access (DMA). It formats each memory bit 
into a point on the tv screen to give a 
128x 128-element picture. Only a 2K-bytc 
computer memory is required (only 512 
bytes for a 32 x 32 picture). The quality of 
the pictures is evident in the photos. 

The Dazzler® output is a video signal 
that goes directly to the tv video amp or to 
the antenna terminal through an inexpensive 
commercially -available device. 

Inexpensive — and so much better 
You can see from the list below that the 
Dazzler® is little if any more in price than 
an ordinary b/w interface or tv typewriter. 
But it does so much more. 



Order now 
By mail or at your computer store 

If you're into computers (or want to be), 
if you want to invent these beautiful 
displays or games, or to plot colorful 
material inexpensively at home or in 
business, the Dazzler® is for you. 

Not only is it reasonable, but it's sold at 
computer stores from coast to coast. 

Or order directly by mail on your bank 
card. 



TV DAZZLER® (complete kit) . . . $215 
TV DAZZLER® (fully assembled 

and tested) $350 

SOFTWARE 
(punched paper tape with documentation) 

LIFE in full color $15 

KALEIDOSCOPE in full color . . . . $15 
DAZZLE-WRITER (for alpha- 
numeric displays in color) $15 

Shipped prepaid if fully paid with order. 
California users add 6% sales tax. 

Mastercharge and BankAmericard accepted 
with signed order. 

Delivery: from stock for immediate shipment. 



Q Cromemco 
Specialists in computer peripherals 
One First St., Los Altos, CA 94022 • (415) 941-2967 



It's like being pioneers- 
spirits are high and there is 
a wilderness to contend 
with. 



known to become bored over an extended 
period of time. 

Since such an extensive game as we have 
available is not useful to the average 
hobbyist on his micro, it seems reasonable 
that many will turn to one of the BASIC 
versions of Space War such as you have 
referenced as being available in the DEC 
book of 101 BASIC Games. Your January 
book review failed to mention that the 
reproduction quality of programs in that 
book varies for each of the programs. Unfor- 
tunately, the reproduction of Space War in 
that book is very hard, if not impossible to 
read, because the master was obtained from 
a Teletype that was not properly aligned. 
The bottoms of the characters are cut off in 
the copy of the book that I bought. How- 
ever, most of the programs in that book are 
reproduced quite well and I would add my 
general endorsement to your book review. 

I enjoy BYTE and would add my vote to 
others you have received regarding the 
happy combination of ham radio and com- 
puters as the source of future articles. 

Dave Vandaveer 
Santa Ana CA 

SOME SPACE WAR BACKGROUND 

Regarding the enquiry concerning Space 
War (page 86, January BYTE) I can agree 
that it is a stimulating, dynamic (and there- 
fore very time-consuming) game. Its origins 
are shrouded in mystery, but it is part of a 
standard demonstration packet released by 
DEC for their machines with graphics capa- 
bility, such as the PDP-12 or the GT40 
system. The essence of the game is the 
control of two rockets (displayed on a 
CRT)which have missile-firing systems; the 
object is to blast your dreaded enemy from 
the spaceways. Most versions use four bit- 
controlled parameters for each ship: rotate 
up, rotate down, fire thrustcr and fire 
missiles. More elaborate versions include 
meteorite obstacles, a central sun which 
modifies trajectories due to its gravitational 
pull and "space warp," the ability to dis- 
appear when threatened with incipient 
destruction (but not know when or where 
you will reappear). 

The most primitive version of the game 
will run in a PDP-8 with 4 K. There must be 
some provision for graphics display, either a 
point-plotter or DA converters and a CRT. 
Control can be via console switches, and 
timing is aided by a real time clock, although 
this latter requirement is not necessary. The 
main problem with running the game on a 
micro is word size. Velocity and position of 
the rockets is calculated iteratively, and 



small roundoff errors yield large net changes 
as the game goes on. For this reason, all 
parameters arc calculated double precision 
(24 bit) on the PDP-8, which is triple 
precision on most micros. The increased 
overhead as a result of this requirement may 
spoil the timing and slow the game down, 
although the PDP-8 executes a complete 
update loop in somewhat less than 10 ms, 
and this can be slowed to about 30 ms 
before the onset of noticable flicker. The 
display may pose a problem as well, since 10 
bit resolution on a CRT is acceptable, but 8 
bit may be pushing things a bit. 

A B Bonds, PhD 
Berkeley CA 

NAVIGATING AN OCEAN 
OF INFORMATION 

First, let me say that I'm enjoying BYTE 
very much and look forward to each new 
issue. 

The microcomputer system I've built uses 
an 8008 but will eventually expand to 
symbiosis with an 8080 CPU. I want to 
express my happiness that you are not 
abandoning those of us hobbyists who have 
8008 based machines. I know all too well 
the limitations of the 8008, but I think it is 
still a superb way to start out. The 8008 
instruction set almost immediately inspires 
affection with its non-threatening three 
letter mnemonics and their nice correlation 
to octal number representation. 

1 think most of us know that we're into a 
unique thing with this burgeoning new baby 
of a hobby. It's like being pioneers - spirits 
are high and there is a wilderness to contend 
with. Big time centralized computers were 
not a panacea for the world's ills. The new 
wilderness we face is information glut and it 
threatens to swamp us more essentially at 
the individual level than at the institutional 
level. Microcomputers are a new tool that 
promise deliverance. They can be a seem- 
ingly playful tool, but they possess the 
power to navigate that ocean of information 
which modern man must sail upon. Well, I 
just wanted to philosophize a little and say 
that I think this new hobby (and BYTE) will 
be an aid to us all. 

Adam Trent 

Ascension Island 

Patrick AFB FL 

AN IMPROVED CASSETTE 
INTERFACE CIRCUIT 

As might be expected, we have made 
some changes and improvements to our 
cassette interface circuit which will be of 




Altair 4K Static. 



Altair 4K Static (rom MITS is unquestionably the finest 4K 
static memory available anywhere. It is also the fastest. 

Altair 4K Static uses Intel 2102 A-4 memory chips which have 
a worst case access of 450 nanoseconds at 70 °C. At normal system 
temperatures the access times are typically less than 300 nano- 
seconds. 

Altair 4K Static is fully isolated from the system bus by 
Schmitt™ Triggers. Thus, the excessive capacitive loading caused 
by other 4K static memories is eliminated. Use of these triggers 
on all Altair 4K static inputs greatly reduces noise. Internal data 
collection nodes also use Schmitt Triggers, which prevents internal 
data bus noise from being transmitted to the system data bus. 

Altair 4K Static is the only 4K static supported by MITS. 
Owners of Altair 4K Static are eligible to qualify for discounts 
on AltairBASICand other MITS products. 

Altair 4K Static is the only 4K static that comes with all the 
required Altair hardware including edge connectors and card 
guides. 

Altair 4K Static is the answer for Altair owners who need 
static memory for special applications such as the TV Dazzler 
from Cromemco. 

PRICES: 

Altair 4K Static Kit $159 

Altair 4K Static Kit with 2K Memory $134 

Chip set to convert 2K to 4K $ 45 



SPECIAL— Altair Documentation Notebook. Contains catalog, 
price sheet, Computer Notes newspaper, Software Information 
Package, technical data on Altair hardware, list of authorized 
Altair dealers, list of computer clubs, survey of home computing 
market, and much more. All in top quality three ring binder." 
Only $5 plus $1 for postage and handling. Offer expires April 30, 
1976. 

MAIL THIS COUPON TODAY 



_or Master Charge # _ 



Enclosed is check for $ 

BankAmericard # \ 

] Altair 4K Static O Altair 2K Static 

Include $3 for postage and handling 
) Please send me the Altair Documentation Notebook. Enclosed is $5 plus $1 for 

postage and handling. 
) Please send free catalog and price sheet. 



N AMF 

Ar>r>RFS<; 




' - I 


CITY 


SE/Albuquerque, 


"iTATF k. 7IP 1 


MITS/2450 Alamo 


NM 87106/505-262-1951 



Prices, delivery a\i<\ specifications subject to change. 

ljDQLjS© 

2450 Alamo SE/Albuquerque, NM 87106/505-262-1951 



interest to your readers. These improve- 
ments were still being worked out when I 
submitted the article ("Digital Data on 
Cassette Recorders," page 40, March 1976 
BYTE), hence they were not included. 

We were quite disappointed in the 
performance of the 4047 as a retriggerable 
one shot, therefore we went back to the 
9601 or 74122 we had used in earlier 
designs. We have also eliminated the need for 
± 12 volt power supplies by changing the 
design of the signal conditioner circuit and 
by using the AY5-1014 UART. The entire 
circuit now operates from a single 5 volt 
supply. 

We discovered the circuit described in the 
article was sensitive to the polarity of the 
received signal from tape. To eliminate this 
sensitivity we went back to a double edged 
pulse former. This required the one shot 
period to be reduced to 278 microseconds 
and the elimination of one of the flip flops 
in the Phase Locked Loop feedback divider 
string. Adjustment is the same as before. 

Some hobbyists who have seen the circuit 
have wondered why we used the 339 Quad 
Comparator for the signal conditioner since 
only one section was used. The Pronetics 
circuit card uses one of the remaining 



sections as a level sensor to inform the user 
of proper playback level. Another section is 
used to indicate when data is being received 
from tape and the remaining section is used 
to drive a relay which remotely controls the 
cassette tape unit. If these functions are not 
necessary a 311 comparator can be substi- 
tuted for the 339. 

We designed out most of the CMOS 
integrated circuits because of handling 
problems in low humidity (static discharge 
destruction of gates). The 4046 PLL was 
retained to permit operation with a single 5 
volt power supply. 

Enclosed is a drawing of the improved 
circuit. If your readers have any questions I 
will be happy to answer if they include a self 
addressed stamped envelope. 

Harold A Mauch 

4021 Windsor 

Garland TX 75042 

RTTY AND MORSE 

So far, I have found your magazine 

excellent in all respects. You appear to be on 

top of all the latest machines and devices on 

the market, and the articles are timely and 

continued on page 71 



SIGNAL 
CONDITIONER 



50 K 

' (AD JUST FOR 278(isec) 

5IOK 




INPUT -" f | 

1 f° K 



4800Hz >~ 



C 

K Q 
R 

3? 



ib -> 



I AUX 
( SOOmV P-P) 



+ 5VDC ^ ^ ^ £_ 

T I5V T T T 

LGN0 > • • • • — 



lb 



, MIKE 
(50mV P-P) 



10 



You can buy 

this microcomputer 

for $39.95, but... 



We would be a bit surprised if you 
could do anything meaningful without 

additional hardware and software. mc 

Wave Mate's Jupiter II™ isn't the kind of 

microcomputer kit you only stare at . . . when 

you've completed your Jupiter II just plug in 

your terminal and you're ready to go. That's 

because it goes beyond the sum of its high 

quality parts. It's the ultimate micro kit 

experience. In performance, in documentation, 

in reliability. First, consider its superb features. 

It has small pluggable wire wrapped cards 

easily tailored to suit your modifications. 

Every IC is socketed and 100% burn-in tested. 




6800 



In fact every part including the powerful 
MC 6800 CPU and the 8K dynamic RAM 
is guaranteed for 120 days. It has the best 
software around, System Monitor and Debug 
programs (ROM). Includes powerful text 
editor and Motorola compatible assembler. 
And BASIC at no extra cost. Because we've 
been making microcomputer systems for over 
4 years, we can offer you the broadest line of 
interfaces including TV terminal and dual 
audio cassette. Impressive. And yet the 
grandest feature is the experience 
of completing a kit that works. 
Guaranteed. 



E2B 

lUave. TTlate. 



ACT NOW AND SAVE. (Good until April 1. 1976) 
SPECIAL price $1445.00 (assembled $1950.00) 

Jupiter II Microcomputer Kit Includes: 



I 
I 
I 



Modular plug-in power 

supply 

9 module PC backplane 

CPU module 

System monitor module 

8K dynamic RAM 

module 

Serial RS 232 

communication interface 

module 

Front panel module 

Front panel 

Wire-, cut, stripped, color 

coded 



• Rack mount module cage 

• Wire wrap tool 

• Wire unwrap tool 

• Cables, connectors, all 
other necessary 
hardware 

• Software (editor, debug, 
assembler, BASIC) 

• Assembly manuals 

• Operators manuals 

• Theory of operation 
manuals 

• Annual membership in 
users group 



O Send Jupiter II micro kit. 
□ Kit □ Assembled 

~\ Send details on kit-a-month 

~2 I'm not convinced; send me 101 reasons why. 

] Please send free Jupiter II System catalogue. 



fj Check enclosed for $ 



Include $10.00 for postage and handling. California 
residents add 6% tax Delivery 60 days ARO 

Name 




Address. 



Oity/State/Zip 



WAVE MATE 

1015 West 190th Street Gardena, California 90248 

Telephone (213) 329-8941 



3EI 



Wju/*7TlaU 



WARRANTY 

120 days on all parts, 

materials and workmanship. 



11 



April Fool came a little early with Space Ace. We aced out on Bob Baker's puzzle in March 
BYTE, page 77, by omitting the word list. Here it is again, with the word list. Answers will 
appear in May BYTE. 



N 


F 


S 




B 


R 






T 




N 




S 






P 




R 




C 




R 


D 




M 




N 


S 






N 


R 


T 






T 


P 




T 


R 




T 




R 




P 






W 


R 




T 




X 


T 




R 


N 




L 


R 






G 




D 




C 




D 




C 


N 










N 


S 


R 




L 


B 






R 




V 


S 


G 




B 


W 


C 






c 








D 


N 




P 




N 


T 


R 




H 


C 


M 


N 


T 


N 


M 


R 


T 




C 










N 






H 




C 


T 




P 


C 






C 


M 


G 


R 


D 


N 


R 


T 


L 






T 




L 


S 


R 








Y 


N 


T 


P 






M 


G 






S 




N 


L 


L 


T 


N 




R 


P 


R 


V 


P 




D 




D 


P 


C 


L 






L 


F 


Y 








L 


R 


R 


L 










S 


L 






R 


R 


G 






P 




T 


Y 


P 






T 




N 




B 


R 




Q 


X 




S 


C 




L 




R 


L 




T 




R 




L 




F 




N 


C 


T 






N 


G 




S 


S 




Y 


L 



Robert Baker 
34 White Pine Dr 
Littleton MA 01460 



Space Ace 

By inserting the missing vowels (a, e, i, 
o, and u) in the appropriate blanks, all 50 
words from the list will fit into the matrix. 
As you find each word and insert the correct 
vowels, circle the word in the matrix and 
cross the word off the list. Words may be 
forward, backwards, up, down, or diagonal, 



but always in a straight line, never skipping 
letters. However, some of the letters are used 
more than once. After circling all the words 
on the list, the seven remaining letters 
(including two blanks for vowels) in the 
matrix will spell the name of a high level 
computer programming language these 
words are related to. Be careful, though; 
some words may appear to fit in more than 
one place in the matrix. There is, however, 
only one correct position for each word, so 
that all the words from the list will be used. 



ARRAY 

ASSIGN 

BUG 

CALL 

COMPLEX 
•DATA 
•DECODE 

DIMENSION 

ENCODE 
•END 

ENTRY 

EQUIVALENCE 



EXPRESSION 

EXTERNAL 

FIELD 

FIND 

FUNCTION 
"GOTO 

IMPLICIT 

INTEGER 
"LABEL 

LIBRARY 

LITERAL 

LOGARITHM 



' words that appear to fit in more than one 
location, but only one position is correct. 



LOGICAL 

LOOP 

NAMELIST 
•NOT 

OCTAL 

OPERATOR 

OUTPUT 

PAUSE 

PRECISION 

PRINT 

PROGRAM 

PUNCH 
•READ 



•REAL 

RECORD 

RETURN 

REWIND 

SCALAR 

SPACE 

STOP 

SUBROUTINE 
•TAG 

TYPE 
•UNIT 

VARIABLE 

WRITE 



12 



For a limited time only, you can own an Altair 
8800 Computer kit with 4,096 words of memory, 
new Altair multi-port interface, and revolutionary 
Altair BASIC language software, for just $695. A 
savings of up to $114!* 











Computer. The Altair 8800 is the best-selling general-purpose 
computer in the world today. It is a parallel 8-bit word/16-bit 
address computer with an instruction cycle time of 2 micro- 
seconds. It was designed for almost unlimited peripheral and 
memory expansion, using a bus system where all input/output 
connections merge into a common line. The Altair 8800 is capable 
of addressing up to 65,536 words (bytes) of memory. Regularly 
priced at $439 for a kit and 5627 assembled. 

Memory. The Altair 4K Memory Board provides 4,096 words 
of dynamic random-access-memory for the Altair 8800. Contains 
memory protect circuitry, and address selection circuitry for any 
one of 16 starting address locations in increments of 4K. Access 
time is 200-300 nanoseconds. The entire 4,096 words of memory 
on the board can be protected by switching to PROTECT. Regu- 
larly priced at $195 for kit and $275 assembled. 

Interface. Your choice — either the new Altair 88-2SIO serial 
interface or the new Altair 88-4PIO parallel interface. The serial 
interface can be ordered with either one or two ports and the 
parallel interface can be ordered with up to lour ports. Add $24 
for an additional 88-2SIO port kit. Add $30 for each additional 
88-4PIO port kit. 

Each port of the new serial interlace board is user-selectable 
for RS232, TTL, or 20 milliamp current loop (Teletype). The 
88-2SIO with two ports can interface two serial I/O devices, 
each running at a different baud rate and each using a different 
electrical interconnect. For example, the 88-2SIO could be inter- 
faced to an RS232 CRT terminal running at 9600 baud and a 
Teletype running at 110 baud. An on-boartl, crystal-controlled 
clock allows each port to be set for one of 12 baud rates. The 
88-2SIO is regularly priced at $115 kit and $144 assembled. 

Each port of the new parallel interface board provides 16 data 
lines and four controllable interrupt lines. Each of the data lines 
can be used as an input or output so that a single port can inter- 
face a terminal requiring 8 lines in anil 8 lines out. /Ml data lines 
are TTL compatible. The 88-4PIO regularly sells for $86 kit and 
$112 assembled. 

Software. Altair 4K BASIC leaves approximately 725 bytes in 
a 4K Altair for programming which can be increased by deleting 
the math functions (SIN, SQR, RND). This powerful BASIC has 



16 statements (IF . . . THEN, GOTO, GOSUB, RETURN, FOR, 
NEXT, READ, INPUT, END, DATA, LET, DIM, REM, RESTORE, 
PRINT, and STOP) in addition to 4 commands (LIST, RUN, 
CLEAR, NEW) and 6 functions (RND, SQR, SIN, ABS, INT, TAB, 
and SCN). Other features include: direct execution of any state- 
ment except INPUT: an "@" symbol that deletes a whole line 
and a "<— " that deletes the last character; two-character error 
code and line number printed when error occurs; Control C which 
is used to interrupt a program; maximum line number of 65,529; 
and all results calculated to seven decimal digits of precision. 
Altair 4K BASIC is regularly priced at $60 for purchasers of an 
Altair 8800. 4K of Altair memory, and an Altair I/O board. Please 
specify paper tape or cassette tape when ordering. 

$t Savings depends upon which interface board you choose. 
An Altair 4K BASIC language system kit with an 88-2SIO interface 
regularly sells for $809. With an 88-4PIO interface, this system 
sells for $780. 

NOTE: Offer expires on March 30, 1976. 



MUU 



"Creative Electronics" 

MITS/6328 Linn N.E., Albuquerque, NM 87108 505/265-7553 or 262-1951 
MAIL THIS COUPON TODAY! 

D Em losed is < hei k for $ 

□ BankAmericard tt 



_ □ or Master Charge n- 



□ All, .ii B.AS'IG System Special □ -tl'IO interface LT 2SIO interface 
f_j Cassette tape □ or paper tape 

G Extra SIO port G Extra 4PIO ports 

Ad.! »8 for postage and handling 

□ Please send free literature 



NAME. 



ADDRESS_ 
CITY 



.STATt X. ZIP. 



NOTt: Personal (hecks take 2-3 weeks for clearance For immediate processing 
send money order or use charge card. Delivery: 30 clays. Prices, specifica- 
tions and delivery subject to change. 



What's 

New? 



What's New, KIM-o-sabee? 

MOS Technology Inc has announced a 
new microcomputer system which is being 
marketed to individual hobbyists as well as 
to the standard industrial markets. This 
marks a "first" for the personal systems 
marketplace - a semiconductor manu- 
facturer recognizing the potential of the 
hobbyist market and selling directly to it. 
The product is the KIM-1 Microcomputer 
System. At press time, early information 
describes KIM-1 as follows: 

• 6502 processor (see "Son of Mo- 
torola" by Dan Fylstra in November 
1975 BYTE, page 56). 

• Completely assembled (not a kit). 

• Supplied with the new KIM-1 manual 
and over 400 pages of MOS Techno- 
logy's excellent 6500 series docu- 
mentation. (The 6500 Family Pro- 
gramming Manual has some excellent 
tutorial information as well as specifics 
on the 6500 family computers.) 

• Systems software contained in 2048 




bytes of ROM in two 6530 ROM/ 
RAM/IO arrays. 

• 1024 bytes of static user RAM. 

• 23 key keyboard for programmed in- 
puts and control of the monitor. 

• 6 digit LED display for programmed 
outputs and monitor displays. 

• General purpose serial interface with 
automatic line speed sensing and adap- 
tation. Communications rates from 
110 baud to 1200 baud are supported 
for devices like Teletypes and video 
display terminals. 

• Audio cassette interface (FSK ratio 
recording). 

• 15 bidirectional programmable 10 pins 
to control experimental applications. 

• 1 MHz system clock controlled by a 
crystal. 

The board requires a power supply of +5 
volts at 1.2 amperes for operation of the 
computer and LED displays. With this single 
power supply, you can unpack it from its 
carton and demonstrate programmable oper- 
ation with the onboard keyboard and dis- 
plays. Add a second 12V 0.1 ampere supply, 
and the audio cassette interface can be 
exercised with your inexpensive cassette 
recorder. 

This product will prove attractive to 
readers who are not inclined to fondle 
hardware extensively, but want a pro- 
grammable machine with the minimum 
amount of trouble. 



Glorobots 

ft 

A robot was having conniptions 
at reading handwritten inscriptions, 

but acquired the knack 

by decoding a stack 
of typical doctor prescriptions. 



Evolution 

A self-evolved robot named Babbitt, 
because of his dubious habit 

of unbridled mating 

and self-propagating, 
was housed in a hutch like a rabbit. 

Hear Ye Hear Ye 

The sensory robots are near, 
but will not be ready this year, 

for each of them tries 

to eat with his eyes, 
and cocks his nose trying to hear. 

Gloria Maxson 
13602 Cullen 
Whittier CA 90605 



14 



KIM-1 

microcomputei 
system ^ 



jtT 



i^'h, 





A COMPLETE 
MICROCOMPUTER 

ONLY $245 

NOT A KIT! 

• FULLY ASSEMBLED 

• FULLY TESTED 

• FULLY WARRANTED 

OPERATES WITH 

• KEYBOARD & DISPLAY 

• AUDIO CASSETTE 

• TTY 

KIM-1 INCLUDES 

• HARDWARE 

KIM-1 MODULE WITH 
6502^iP ARRAY 
6530 ARRAY (2) 
1 K BYTE RAM 
15 I/O PINS 

SOFTWARE 
MONITOR PROGRAMS 
(STORED IN 
2048 ROM BYTES) 

FULL DOCUMENTATION 
KIM-1 USER MANUAL 
SYSTEM SCHEMATIC 
6500 HARDWARE 
MANUAL 

6500 PROGRAMMING 
MANUAL 

6500 PROGRAMMER'S 
REFERENCE CARD 



USE THIS FORM TO ORDER YOUR KIM-1 TODAY! 



B-4 



I 
■ 
I 

I 



Send to: 




Please ship me_ 



KIM-1 Systems at a cost of $245.00 per system plus $4.50 for 



shipping, handling and insurance (U.S. and Canada only) PA residents add 6% sales tax. 

(International sales subject to U.S. Commodity Control Regulations. 
Add $20.00 per system for shipping and handling of international orders.) 

My check or money order is enclosed for $ 




MOS TECHNOLOGY. INC 
KIM-1, 950 Rittenhouse Rd. 
Norristown, PA 19401 



City_ 



.Zip. 



I 
I 



15 



Programming the Implementation 



Look for logical gaps in 
the design of a specific 
system, then ask yourself: 
"What would happen if I 
did something that is tech- 
nically undefined for my 
computer?" 



Charles A Crayne 
734 S Ardmore Av 
Los Angeles CA 90005 



An exploration of the 
Scelbi 8H reveals two 
single byte instructions 
which are artifacts of the 
implementation: Load 
minus 1 immediate (L1I) 
and read option switches 
(ROS). 



When Scelbi Computer Consulting lnc 
designed their 8H minicomputer system 
around the Intel 8008 CPU chip, they 
implemented two instructions beyond those 
available on the Intel chip. It seems that 
these two instructions are a byproduct of 
the 8H design, and of potential interest to 
the hobbyist. 

The term "architecture" generally means 
the design of a system, or of a family of 
systems. The instruction set, maximum 
address, number of ports, etc., are archi- 
tectural considerations affecting the design 
of a chip. The term "implementation" refers 
to the technical methods used to bring the 
defined capabilities into existence; this may 
be accomplished by backplane wiring, or 
ROM, number and speed of clocks, choice of 
power supplies, etc. 

The distinction between architecture and 
implementation is clearer for a computer 
"family" than for a single device. In the IBM 
line, for example, all 370s share a single 
architecture. The difference between a 
model II 5 and a model 168 is implemen- 
tation. Note also that a designer is not 
required to implement the full capacity 
provided by the architecture. On the Scelbi 
8H, the architecture provides for 16 K bytes 
of main storage, but the implementation 
allows for only 4 K bytes. 

At first glance, the matter of the Scelbi 
8H input ports is just another example of 
implementing less than the full architectural 
capacity. Eight input ports are allowed for in 
the instruction set, but only six are pro- 
vided. A surprise is in store, however, for 
anyone who asks himself the question, 
"What would the computer do if I called for 
input from port 6 or port 7?" (The eight 
possible ports are numbered from to 7.) 

To answer this question, it is necessary to 
consider just why Scelbi decided to provide 
only six input ports. This can be resolved by 



a glance at the logic diagram for the Scelbi 
input board. The function of this board is to 
couple the 8008 data bus, at the appropriate 
times, to one of the input ports, the external 
memory data bus, or (in the case of a front 
panel interrupt) to the front panel data 
switches. This switching operation is imple- 
mented with type 74151 ICs, which are one 
of eight data selectors. That is, they will 
accept eight bits of input, and will output 
one of the eight, depending upon the three 
bit address (000 to 111) supplied at the time 
the enable line goes high. 

The Scelbi designer needed a one of ten 
selector to accommodate the eight input 
ports, the memory bus, and the panel 
switches. But binary addressing just doesn't 
work that way. He could use a one of 16 
selector and leave six inputs unused, or he 
could do as he actually did and use the 
74151s by reducing the number of input 
ports implemented to six. This decision 
resulted in a lower cost system. Logic is 
provided to force the selector addresses to 

110 for memory input operations, and to 

111 during interrupt processing. But, again, 
probably for cost reasons no logic is pro- 
vided to assure that the address specified 
in an input instruction is limited to the 000 
to 101 range (I NO to IN5). 

Therefore, the IN6 instruction (input 
from port 6) causes the accumulator to be 
set from the memory bus, and the IN7 
instruction causes the accumulator to be set 
from the front panel switches. Unlike the 
LAM instruction, however, IN6 does not 
cause the memory address to be developed. 
Therefore, the result of the instruction is to 
load the accumulator with the value —1 or 
377 in octal. This is not exactly a big deal, as 
it is exactly the same effect as would result 
from requesting an input from any uncon- 
nected port. Still, it can be of some use in 
saving memory space in exactly the same 
way as the experienced programmer uses an 



16 



BIG 

HBJPFOR 

SMALL 
BUCKS. 



Used to be, filling your bench 
with really good test equipment 
meant emptying your wallet. 
Because you had to pay a price 
for quality and versatility. A 
high price. 

Not anymore. CSC's 
ingenious new Design Mate™ 
line of test equipment combines 
performance high enough for 
most lab applications with the 
kind of versatility and economy 
everyone can afford. Thanks to 
a number of new design 
concepts and manufacturing 
techniques. 

Proof? Check the specs and 
prices below, then visit your 
CSC dealer for a demonstration. 
Or write for our catalog and 
distributor list. 



CONTINENTAL SPECIALTIES CORPORATION 



Design Mate 1 Breadboard/ 
Power Supply. $49.95* 






EASY DOES IT 

44 Kendall Street, Box 1942 

New Haven, CT 06509 • 203-624-3103 TWX: 710-465-1227 

West Coast office: Box 7809, San Francisco, CA 

94119 • 415-421-8872 TWX: 910-372-7992 

Canada: Len Finkler Ltd., Ontario 



© 1976, Continental Specialties Corporation 

"Manufacturer's suggested list 

Prices and specifications subject to change without notice. 




Design Mate 2 Wide-Range 
Function Generator. $64.95* 



Design Mate 3 Precision 
R/C Bridge. $54.95* 



XRA instruction instead of a LAI 000 
instruction to clear the accumulator. This 
"load —1" instruction only occupies one 
byte of program space as compared to the 
two bytes required by an ordinary 
immediate instruction. 

The IN7 instruction is more useful. The 
ability to dynamically interrogate the front 
panel switches during the execution of the 
program allows the operator to modify the 
program operation without the need for 
complex console communication routines. 
This capability was known as program 
option switches on the IBM 1401 and similar 
machines and was once widely used in 
commercial applications. 

Suppose that one had a program which 
printed mailing labels for a computer news- 
letter. To save postage, it is desired to send a 
certain issue only to those who have 
indicated an interest in the specific topics 
covered. For example, some persons want to 
read only about hardware design, while 
others are interested in applications, com- 
piler writing, etc. Multiple interests are 
allowed. 

If up to eight areas of interest are coded 
as bits in an option byte included in the 
machine readable address list, then a pro- 
gram can create any desired subset of the list 
just by comparing to see if any bit in the 



option byte matches the corresponding bit 
in the program option switches. (The pro- 
gramming to do this is quite simple. Point 
the memory registers to the option byte in 
the file buffer, read the switches with IN7, 
and the option byte with the NDM instruc- 
tion, and skip printing with a JTZ if the 
option does not match the switches.) 

Another possible application would be to 
write an output subroutine such that it 
checks the program option switches to see if 
it should write to a video display, a hard- 
copy device, or both. This technique could 
save a lot of paper during program checkout, 
or when just demonstrating an application, 
and still allow permanent reports when 
required. 

If you don't have a Scelbi, you can still 
implement program option switches yourself 
by putting a few switches in a minibox and 
hooking it up as a regular input device. But 
the interesting question is: What hidden 
capabilities does your system have? All you 
need is a little imagination and an inquiring 
mind. Look at your own system. Compare 
the users manual with the logical structure in 
the CPU chip manufacturer's catalogue. 
Look for logical inconsistencies and restric- 
tions. Try some experiments with your 
equipment. Maybe you too can discover 
some new abilities for your system." 



Whatever your computer, 
get to know the implemen- 
tation as well as possible. 
You may be able to find 
similar hidden 
instructions. 



Architecture refers to 
overall system design — 
implementation refers to 
the specific technical 
methods. 




What's 

New? 



Here is a product which will be of interest to many BYTE readers. This is an electronically 
controlled variable speed digital cassette deck which can be adapted for use by the home 
computer experimenter. It is made by Triple I, a division of the Economy Company, PO Box 
25308, Oklahoma City OK 73125. Its price is in the $100 range and it should prove to be an 
excellent medium for totally automated data storage in personal computing systems. 



18 



JTfCElM 

SOFTWARE 




FOR BEGINNERS 



A N 

ao ob 

EDITOR PRDGHAW1 



"8008" 

SOFTWARE 

MANUALS 



ppd. 

Assembler Programs 
For The "8008" 

Minimum length assembler program 
for 2K memory, plus sophisticated 
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Biorhythm for Computers 



According to the bio- 
rhythm hypothesis, there 
is a reason for those dol- 
drum days when even your 
computer refuses to com- 
municate with you. 



[NOTE: The ideas pre- 
sented in this article are a 
hypothesis about human 
mental states and are not 
necessarily a valid predic- 
tive theory. One danger of 
computer programming is 
the assumption that a 
logically correct program 
wh ich ex ec u tes wi th out 
bombing out will neces- 
sarily produce meaningful 
results. Whatever the final 
conclusion with regard to 
the biorhythm hypothesis, 
the calculation makes an 
interesting example of a 
BASIC language applica- 
tion program. ... C H ] 



Joy and Richard Fox 
1364 Campbell St 
Orlando FL 32806 



There is no doubt that all living things 
have biological rhythms. The study of three 
of these rhythms in humans has led to the 
development of a pscudo science, bio- 
rhythm, that, through the use of computers, 
is growing in popularity in the United States. 
This article describes a program, written in 
BASIC, which you can run in your own 
computer to plot biorhythm curves. 

The purpose of the program is to use the 
biorhythm hypothesis to "predict" physical, 
emotional and intellectual patterns that indi- 
cate up, down and critical clays for any 
period of time. These predictions are based 
on what purport to be scientific studies of 
human behavior. Biorhythm people claim to 
have learned through their studies that a 
physical cycle occurs every 23 days, an 
emotional cycle occurs every 28 days and an 
intellectual cycle occurs every 33 days. The 
plotting of these rhythms is printed out as a 
two-dimensional graph on a Teletype or 
similar output device, showing the three 
cycles as a function of time. 

The biorhythm hypothesis is nothing 
new. It was first proposed in the late 
nineteenth century by a Viennese psycholo- 
gist and a German physician, each working 
separately. In the 1920s, an Austrian teacher 
added the 33 day intellectual cycle after 
studying the performance of high school and 
college students. 

According to the biorhythm hypothesis, 
there is a reason for those doldrum days 
when even your computer refuses to com- 
municate with you. Each of the three cycles 
oscillates between ups and downs. When 
your cycles are up, you feel physically 



strong, emotionally high or intellectually 
brilliant. When your cycles are down, you 
feel physically weak, emotionally depressed 
or intellectually dull. But the days to really 
watch out for are the transition days when 
you are crossing from a low to a high or a 
high to a low. It is during these transition 
clays that you are especially susceptible to 
accident and illness. A few limes each year, 
two or even all three of your cycles will 
cross the transition simultaneously. Accord- 
ing to biorhythm people, these critical days 
are best spent quietly. 

The biorhythm 'hypothesis has gained 
acceptance in a growing number of indus- 
tries. In Japan, 2,000 businesses use bio- 
rhythm calculations. One Japanese firm 
reports a 35% reduction in computer data 
errors by assigning workers to other tasks 
when they are going through critical days. 
Another Japanese firm using biorhythm pre- 
dictions claims to have reduced its yearly 
vehicle accident loss by 45%. An American 
survey of 1,000 industrial accidents showed 
that 90% of them occurred on critical days. 

Mike Bertalot, a supervisor for United 
Airlines, estimates that between 6,000 and 
8,000 of United's 40,000 employees are 
using biorhythm predictions as a guide for 
safety awareness. United uses the printouts, 
which they distribute to interested em- 
ployees, as "an excuse to warn employees 
about safety." The result has been that some 
departments have shown a 50% decrease in 
accidents. It is not clear whether this reduc- 
tion is due to the extra warnings or to the 
predictive value of the hypothesis. Although 
the future of the biorhythm experiment at 
United is uncertain, the results are being sent 
to the United States Naval Laboratory, 
which is studying the hypothesis. 

Biorhythms have also been used for 
profit. The September 15 1975 issue of 
Newsweek quotes Lester Cherubin, president 



20 



of Time Pattern Research, Inc, as having sold 
1 00,000 biorhythm printouts for $1 to $20 
each in the past three years. Other com- 
panies sell plastic biorhythm calculating de- 
vices for anywhere between $4 and $20. 
Some shopping center vendors sell for a 
mere 50 cents a computer printout of your 
rhythms for one day. 

The calculation of biorhythm curves is 
not easy to do with a pencil and paper. First, 
the subject's age in days must be calculated. 
This problem, of course, is complicated by 
all the peculiarities of the modern calendar. 
Then you must calculate how many com- 
plete 23 day cycles the subject has lived 
through and how many days he is into the 
next cycle. (The biorhythm hypothesis 
makes a simplifying assumption that all 
cycles originate at birth with zero relative 
phase.) The same must be done for the 28 
and 33 day cycles. The fraction of each 
cycle is multiplied by two pi radians and the 
sine of that number is taken to obtain the 
points of the biorhythm curve for that day. 
The calculation must be rerun for each 
succeeding day, and the results plotted on 
graph paper, in order to obtain the bio- 
rhythm curves. 

The program to calculate biorhythm 
curves is shown in the form of a flow chart 
in figure 1; figure 2 shows the complete 
listing of this program in BASIC. The opera- 
tion of the program is as follows: 

Line 0001 dimensions the strings N and S 
and the array T. N will be filled with the 
character set for the days of the month and 
S will be filled with the image of each line of 
the graph, as it is prepared for- printing. T 
will be filled from the data statement at line 
0080 with the number of days in each 
month of the year. The input statement at 
line 0008 and the if statement at line 0009 
together allow the user to skip over the 
explanatory printout at the beginning of the 
program and go directly to the calculation 
which starts at line 0027. 

Line 0040 defines the numeric values for 
the month, day and year that the-subject 
was born. Line 0050 defines the month, day 
and year for the start of the printout. The 
year can be supplied as a two digit number 
(76) or as a four digit number (1976), but 
the same format must be used for both the 
birth date and the printout target date. Line 
0065 defines the number of days to be 
plotted. 

D3 in the program is the variable which 
will contain the age of the subject in days. 
At line 0130, D3 is initialized to 0. The 
program will now calculate the number of 
days between the subject's birth date and 
the requested plotting date. The calculation 
is performed in several steps, and at the end 



(biorhythm) 




INTERACTIVE 
SEQUENCE TO DEFINE 
BIRTH DATE, PLOT 
DATE, DAYS TO 
PRINT 



CALCULATE 
LIFESPAN AT 
START OF THIS 
YEAR 




of each step, the value calculated at that step 
is added to the total in D3. 

Next, the program checks if the subject 
was born in January or February of a leap 
year. The test for a leap year, at line 0150, is 
made by dividing the birth year by four and 
checking for a remainder. Only leap years 
divide by four with a remainder of zero. If 
the subject was born in January or February 
of a leap year, one day is added to the 
running total, at line 0160. Otherwise, the 
running total is left at zero. 



Watch out for evil omens 
on transition days. 



While not intended to ap- 
ply to machines, maybe 
biorhythms can be used to 
predict computer be- 
havior. Enter the birth 
date of your computer and 
predict when your cyber- 
netic monster plans its 
next bomb out! 



Figure I: Flow Chart of 
Biorhythm Calculator. 
This chart illustrates the 
general outline of the 
program found in figure 2. 
The numbers noted next 
to symbols in the flow 
chart refer to line numbers 
of the listing in figure 2. 



V 



21 



0001 
0002 

■ 1 0004 
0006 

'0007 
0008 
0009 
0010 
i 0011 
0012 
0013 
0015 
0016 

,0017 
0018 
0019 
0020 
0021 
0022 
0023 
0024 
0025 
0026 
0027 
0028 
0040 
0045 
0050 
0060 
0065 
0080 

- 0110 
0120 
0130 
0140 
0150 
0160 
0200 
0210 

- 0220 
0230 
0240 
0250 
0260 
0270 
0280 
0290 
0299 
0306 
0310 
0315 
0316 
0320 
0325 
0400 
0405 
0410 
0450 
0455 
0460 
0470 

04 75 
0480 
0490 
0491 
0492 
0493 
0500 
0505 
0510 
0520 
0525 
0526 
0530 
0640 
0550 
0560 

05 70 

- 0571 
0580 
0600 
0610 
0640 
0650 
0655 
0660 
0670 
0680 
0690 
0700 
0710 
0720 
0727 
0728 
0729 
0731 
0732 
0733 
0734 
0735 
0736 
0741 
0742 
0743 
0744 
0745 
0746 
0747 
0748 
0750 
0800 
0810 
0815 
0816 
0817 
0818 
0820 
0830 
0835 
0840 
0850 
0870 
0880 
0900 
0950 
0951 
1000 



DIM NSI72). SSI72I. TI12I 

MS -'-00010203040506070809 101 11 21 3141 5161 7 1819202 122232425262728293031" 

REM BIORHYTHM CREATED BY JOY AND RICHARD FOX 

PRINT "DO YOU WISH AN INTRODUCTION TO BIORHYTHM' TYPE 1 FOR YES." 

PRINT "OR FOR NO " 

INPUT A 

IF A-0 THEN 27 

PRINT TAB125I. "BIORHYTHM" 

PRINT 

PRINT 

PRINT 

PRINT ' 

PRINT ' 

PRINT ' 

PRINT ' 



"THE PURPOSE OF BIORHYTHM IS TO PREDICT A PHYSICAL." 
"EMOTIONAL AND INTELLECTUAL PATTERN THAT INDICATES YOUR" 
"UP AND DOWN DAYS FOR ANY PERIOD OF TIME BIORHYTHM CAN" 
"SHOW WHICH DAYS WERE GOOD OR BAD FOR YOU BEGINNING WITH" 

PRINT "YOUR BIRTH IT CAN ALSO SHOW YOU WHICH FUTURE" 

PRINT "DAYS WILL BE GOOD OR BAD FOR YOU " 

"THESE PREDICTIONS ARE BASED ON SCIENTIFIC" 

"STUDIES TO DETERMINE WHY ACCIDENTS OCCUR IT WAS LEAH NED" 
"THROUGH THESE STUDIES THAT A PHYSICAL CYCLE OCCURS EVERY" 
"23 DAYS. AN EMOTIONAL CYCLE OCCURS EVERY 28 DAYS. AND AN" 
"INTELLECTUAL CYCLE OCCURS EVERY 33 DAYS " 



PRINT ' 
PRINT ■ 
PRINT ' 
PRINT ' 
PRINT ' 
PRINT 
PRINT ' 
PRINT ' 



"PLEASE TYPE YOUR BIRTH DATE USING THE FOLLOWING FORMAT ' 
"MM.DD.YY EXAMPLE JANUARY 1 7. 1942 01.17,42" 

INPUT M. D, Y 

PRINT "AT WHAT DATE ARE YOU INTERESTED IN BEGINNING BIORHYTHM" 

INPUT Ml. Dl. Yl 

PRINT "HOW MANY DAYS DO YOU WISH TO HAVE PLOTTED'" 

INPUT D2 

DATA 31. 28. 31. 30. 31, 30. 31. 31. 30.31. 30. 31 

REM M^MONTH. D=DAY. Y=YEAR 

REM D3-TOTAL NUMBER OF DAYS ELAPSED 

D3=0 

IF M>2THEN 200 

IF INT(Y,4MY,4K THEN 200 

D3-1 

FOR 1 = 1 TO 12 

READTIII 

REM TODAYS IN EACH MONTH 

NEXT I 

D3=TIMI-D + D3 

FOR l-M*l TO 12 

D3.TII1+D3 

NEXT I 

REM Y3 = YEAR COUNTER FROM BIRTH TO DISPLAY 

Y3=Y 

Y3=Y3+1 

IF Y3^ = Y1 THEN 400 

IF INTIY3/4I [Y3.4I-0 THEN 320 

D3=D3+365 

GOTO 299 

D3-D3*366 

GOTO 299 

IF M1-.=2THEN 450 

IF INTIY1/4I-1Y1 4|, THEN 450 

D3.D3<1 

FOR 1-1 TO MM 

D3-TII>*D3 

NEXT I 

D3-D1 '03 

PRINT "PHYSICAL CYCLE P" 

PRINT "EMOTIONAL CYCLE E" 

PRINT "INTELLECTUAL CYCLE I" 

PRINT 

PRINT 

PRINT 

PRINT "DATE". 

PRINT TABI13). "DOWN"- 

PRINT TABI35I. "CRITICAL"; 

PRINT TABI63I. "UP" 

PRINT "' " 

PRINT " " 

t£I M4 = M1 

Let D4=di 

LET Y4-Y1 

REM M4.D4.Y4 DATE PRINTED OUT IN PLOTTING CHART 

GOTO 580 

REM F-FRACTION INTO CYCLE 

F.ID3/23I-INTID3/23I 

REM X-THE ARGUMENT FOR THE SINE FUNCTION 

XF-2'3.1416 

REM P- THE PHYSICAL POSITION ON THE GRAPH 

P = IISIN{X|il|-24H15 

REM E = EMOTIONAL POSITION ON THE GRAPH 

F'ID3/28MNTID3/28> 

X F-2-3.1416 

E'[ISIN[XH1I'24X15 

F-ID3/33I-INTID3/33] 

X F-2'31416 

REM l-INTELLECTUAL POSITION ON THE GRAPH 

|,(lSIN1XMir24|tl5 

FOR X = l TO 32 

SS12'X 1.2-X1 ■■ " 

NEXT X 

SSI39.39H"" 

SSIP,PI-"P" 

SSIE.E|."E" 

SSIUI-'V 

SS13.3I-"/" 

SS{6.6I = 'V 

SSI1.2)-NSIM4'2<1,M4-2»2I 

SSI4.5l'NSID4 , 2H.D4 - 2t21 

IF Y4>99 THEN 950 

SSI7.7)=NSHlNT(Y4/10r2*2).llNTtY4,'10P2<2ll 

SSI8.BI = NSIIY4INT(Y4/101- 10r2'2.IY4INTlY4.'10riOI , 2*2l 

PRINT SSC1 .631 

PRINT 

IF D2-1 THEN 1000 

D2 = D2-1 

D3-D3+1 

D4-D4+1 

IF M4<^2THEN 820 

IF D4< -29 THEN 820 

IF INTIY4/4I IY4/4K '0 THEN 820 

GOTO 570 

IF D4-C-TIM4I THEN 570 

M4-M4*l 

D4-1 

IF M4--12 THEN 870 

GOTO 570 

M4-1 

Y4--Y4M 

GOTO 570 

Y4--Y4-[INTIY4/!00ri00) 

GOTO 744 

END 



Figure 2: BASIC Program 
of the Biorhythm Calcula- 
tor. This is the complete 
listing of a BASIC program 
to perform calculations 
and plot the results on a 
hard copy printer. 



Lines 0200 through 0230 fill the array T 
with the values in data statement 0080 so 
that the array contains the number of days 
in each month of the year. Line 0240 
calculates the number of days from the 
subject's birth date to the end of his first 
calendar month, and adds that number to 
the running total in D3. Lines 0250 through 
0270 calculate the number of days in each 
month during the remainder of the subject's 
birth year, and add that number to the 
running total. 

The birth year, Y, is transferred to the 
year counter Y3, and the year counter is 
incremented at line 0299. If the year count- 
er is greater than or equal to the year to be 
printed out, Y1,"then the program jumps to 
line 0400. Otherwise, the program adds 365 
or 366 to the running total for each year 
between birth and the target year. Each time 
that is done, the year counter is incre- 
mented. When it matches the printout target 
year, the program jumps to line 0400. 

Next the program calculates the number 
of days between the start of the display year 
and the display day. If the display month is 
March or later, then the program checks if 
the display year is a leap year. If it is, one 
day is added to the running total at line 
0410. Lines 0450 through 0460 add the 
number of days in each month between the 
start of the display year and the display 
month to the running total D3. Line 0470 
adds the number of days into the display 
month to the running total. D3 now con- 
tains the age of the subject in days, as of the 
requested display date. 

Lines 0475 through 0526 print the head- 
er of the graph. Lines 0530 through 0571 set 
up three new variables, M4, D4, and Y4, 
which will contain each consecutive date as 
it is printed out. 

Now the program calculates the phase of 
each of the three biological cycles for the 
subject for the dates requested. The physical 
cycle has a period of 23 days. If you divide 
the age of the subject in days by 23, the 
remainder is a number between and 22.9. 
That remainder is proportional to the phase 
of the subject's physical cycle at the 
requested date. The remainder is stored in 
variable F at statement 0580. F is then 
multiplied by two pi radians and the answer 
is stored in X. X is therefore a number 
between zero and two pi and is proportional 
to the phase of the subject's physical cycle. 
Line 0650 takes the sine of X. The result is a 
value between +1 and -1. This number is 
then normalized to a value between 15 and 
63 and is stored in P. The values 15 and 63 
represent the beginning and ending column 
numbers of the graph on the Teletype. 



22 



Extreme down days will plot in column 15. 
Extreme up days will plot in column 63. 
Critical days will plot in column 39, and 
other days will plot in between these points. 

The same calculation is then repeated at 
lines 0660 through 0680, with a period of 
28 days, for the emotional cycle; and at lines 
0690 through 0720, with a period of 33 
days, for the intellectual cycle. Lines 0727 
through 0729 loop to fill up the string S 
with blank characters, to wipe out old data 
still in the string. Line 0731 places a dot 
character in element 39 of the string, so that 
the zero crossing will be clearly marked by a 
string of dots down the 39th column of the 
page. Line 0732 stores the character "P" 
into the column calculated by the equation 
for the physical cycle. Lines 0733 and 0734 
do the same for the characters "E" and "I". 
Next the program places slashes in elements 
three and six of the string S, so that they 
will print out as slashes in the date at the left 
of the graph. 

The month is placed in array elements 
one and two and the day is placed in 
elements four and five. If the operator typed 
the year as a four digit number, the program 
truncates the most significant two digits. 
Line 0744 places the ten's digit of the year 
into element seven of the string and line 
0745 puts the unit's digit of the year into 
element eight. 

The string S is now ready for printing. 
Line 0746 prints elements one through 63 
across the output device page as a month, 
day, year, a dot at column 39 and the letters 
"P", "E" and "I" in appropriate positions. 
Line 0747 causes the typewriter to double 
space so the graph is easier to read. 

If the number of days left to print, D2, 
has been reduced to one, then the program 
exits. Otherwise, D2 is decremented by one, 
and the age of the subject in days is 
incremented by one. 

The dale in the month, D4, is incre- 
mented and the program checks if the clay to 
be plotted is February 29 of leap year. If it 
is, the next clay's data is plotted. If it is not 
February 29 of a leap year, then the number 
of clays in the month is checked against the 
maximum number of days in that month as 
defined in table T. If the day in the month, 
D4, is too large, it is reset to one and the 
month is incremented. If the month has 
been incremented to 13, it is reset to one 
and the year is incremented. The program 
prints the next day's data and keeps looping 
till all the requested data has been printed. 

This program has an unusual application 
that you may not yet have considered: enter 
the birth date of your computer, and predict 
when your cybernetic monster plans its next 
bomb out!!!" 



J I SH AN INTPPliniPN TO H1PPHYTHM? TYPS 
HI IFHYTHM 



FUR Yfc.P> OP O FOR NO. 



TH* PURPflSf PS HI (iRHVTHM IS TO PPH'IPT A PHYSICAL* 

mOTHWAL AN [i I N T l-Ll. M.TCAL HA"!Tt-HN THAI INP1PATI-S YllfR 

L'P AN I PoWN PaVS HiK ANY Hl-HIOD III" 1IMK RIOPHYTHM CAN 

WPU WHICH PAYS Wt-RI- KCUHi OH HAP I OR YOU HfcOINNlNG WITH 

YOUR HlhlH. IT LAN ALSO SHOW YOf WHMH SLTLRk 

UAYS WILL HI liOOb OR HAL IOP YOU. 

THIS! PPMIICTIONS APS HASH' ON SCltNllMU 

SllPIlS 10 IM I- RM IN I- WHY ACPlPtNTS OCOLR. IT WAS Lt-APNfcD 

THPOlTiH THi-SI STUPID THAI A PHYS11AL CYCLI OCCURS t-otPY 

P3 I'AYS, AN IMPIIINAL CYpLI OH UPS MhHY PH PAYS, AN P AN 

1NTILLICTUAL lYiLI OCILPS H'fcWY PCI PAYS. 

M.I-ACl- Tvp| volh H1P1H PAll ISINO T H h HLLPWpgr, SOPMAT: 

W,PP.YV. tXAHPLI: .IANLAPY 17, 1QA? - 01,|7,A? 

?0 |", 17, A? 

AT WHAT PAT I API- Yot. HT|H|=TH IN HfcOINNINP, HIOPHYTHM? 

? I I , PS, 7 S 

HOU MANY PA V S PO YOU WISH TP MAPI- PLOTTtp? 

PHYSICAL CYPLI - p 
l-MOTJONAL CYPLI = S 
INTFLLIPTl/AL CYoLI = 1 



DATL 

1 I /PS/7 S 



ll/PK/7 S 

I I /?S>/7 ^ 

l i /no/7 E 

I P / I / 7 S 
I P. / '? / 7 S 
IP/( 3/7 s 



CPU 1 PAL 



IP 



P/7 i 
P/07 /7 L 
P/IIK/7 ! 
V/OP/7 ; 



IP/ 



n s 



lg/PO/7 S 
IS/2 1 / ' L 

IP /PP /7 S 
1P/P.1/7 S 
IP/PA/7 I 1 
IP/PS/7 S 
l?/?f /7 S 
1P/P7 /7 i 



IP/P' 



/7 S 



1P/PH/7 S 
IP/30/7 S 
IP/3 I // S 

1 / fl I / 7 6 

01 /OP/7 f- 
01 /OP./7 ^ 



I I 
I P I 



Figure 3: Output of the Biorhythm Calculator. Here Is a listing of the output 
of the program found in figure 2. In this case, the introductory text was 
printed prior to entering the parameter definition sequence. 



23 



The Magic of Computer Languages 



Theodor Nelson 
25 S Seventh Av 
LaG range IL 60825 



©1974 Theodor H Nelson. 
This article is reprinted by 
permission from Computer 
Lib/Dream Machines by 
Theodor H Nelson. The book 
is available from BYTE's 
Books or through Hugo's 
Book Service, PO Box 2622, 
Chicago IL 60690. 



A computer language is a system for 
casting spells. This is not a metaphor but an 
exactly true statement. Each language has a 
vocabulary of commands, that is, different 
orders you can give that are fundamental to 
the language, and a syntax, that is, rules 
about how to give the commands right, and 
how you may fit them together and entwine 
them. 

Learning to work with one language 
doesn't mean you've learned another. You 
learn them one at a time, but after some 
experience it gets easier. 

There are computer languages for testing 
rocketships and controlling oil refineries and 
making pictures. There are computer lan- 
guages for sociological statistics and de- 
signing automobiles. And there are computer 
languages which will do any of these things, 
and more, but with more difficulty because 
they have no purpose built in. (But each of 
these general purpose languages tends to 
have its own outlook.) 

Most programmers have a favorite lan- 
guage or two, and this is not a rational 
matter. There are many different computer 
languages — in fact thousands - but what 
they all have in common is acting on series 
of instructions. Beyond that, every language 
is different. So for each language, the ques- 
tions are 

WHAT ARE THE INSTRUCTIONS? 

and 
HOW DO THEY FIT TOGETHER? 

Most computer languages involve some- 
how typing in the commands of your spell 
to a computer set up for that language. (The 



computer is set up by putting in a bigger 
program, called the processor for that 
language.) Then, after various steps, you get 
to try your program. 

Once you know a language you can cast 
spells in it; but that doesn't mean it's easy. A 
spell cast in a computer language will make 
the computer do what you want - 

IF it's possible to do it 

with that computer; 
IF it's possible to do it 

in that language; 
IF you used the vocabulary 

and rules of the language 

correctly; 
and IF you laid out in the spell 

a plan that would effectively 

do what you had in mind. 

BUT if you make a mistake in casting your 
spell, that is a BUG. (As you see from the 
IFs above, many types of bug are possible.) 
Program bugs can cause unfortunate results. 
(Supposedly a big NASA rocket failed in 
takeoff once because of a misplaced dollar 
sign in a program. [The person responsible for 
that programming error became a fanatic 
about bugs and was a key to the success of 
eyeball debugging of Apollo flight pro- 
gramming . . . CH] ) Gettingthe bugs out of a 
program is called debugging. It's very hard. 

Designing Computer Languages 

Every programmer who's designed a lan- 
guage, and created a processor for it, had 
certain typical uses in mind. If you want to 
create your own language, you figure out 



24 



*W illTWRawQtr 

carries out each instruction 
as it's encountered. 



chews the instructions 
of the language 
into another form 
to be processed later. 





Drawings by Bill Morello, adapted from Nelson's 
drawings in Computer Lib /Dream Machines. 



what sorts of operations you would like to 
have be basic in it, and how you would like 
it all to fit together so as to allow the 
variations you have in mind. Then you 
program your processor (which is usually 
very hard.) 

Basically there are two different methods. 

A compiling language, such as FORTRAN 
or COBOL, has a compiler program, which 
sits in the computer, and receives the input 
program, or source program, the way the 
assembler does. It analyzes the source pro- 
gram and substitutes for it an object pro- 
gram, in machine language, which is a 
translation of the source program, and can 
actually be run on the computer. The 
relation of the higher language is not one to 
one to machine language: many instructions 
in machine language are often needed to 
compile a single instruction of the source 
program. (A source program of 100 lines can 
easily come out a thousand lines long in its 
output version.) Moreover, because of the 
interdependency of the instructions in the 
source program, the compiler usually has to 
check various arrangements all over the 
program before it can generate the final 
code. 

Most compilers come in several stages. 
You have to put the first stage of the 
compiler into the computer, then run in the 
source program, and the first stage puts out 
a first intermediate version of the program. 
Then you put this version into a second 
stage, which puts out a second intermediate 
version; and so on through various stages. 
This is done fairly automatically on big 
computers, but on little machines it's a pain. 



(In fact, compilers tend to be very slow 
programs; but that depends on the amount 
of "optimizing" they do, that is, how 
efficient they try to make the object 
program.) 

An interpretive language works differ- 
ently. There sits in core a processor for the 
language called an interpreter; this goes 
through the program one step at a time, 
actually carrying out each operation in the 
list and going on to the next. TRAC and 
APL are interpretive; it's a good way to do 
quickie languages. 

Interpreters are perhaps the easier 
method of the two to grasp, since they seem 
to correspond a little better to the way 
many people think of computers. That 
doesn't mean they're better. For programs 
that have to be run over and over, compiling 
is usually more economical in the long run; 
but for programs that have to be repeatedly 
changed, interpreters are often simpler to 
work with. 

A Black Art 

Making language processors, especially 
compilers, is widely regarded as a black art. 
Some people have tricks that are virtual 
trademarks. 

Actually, the design of a language, es- 
pecially the syntax, how its commands fit 
together, strongly influences the design of its 
processor. BASIC and APL, for instance, 
work left to right on each line, and top to 
bottom on a program. Both act on some- 
thing stored in a work area. TRAC, on the 
other hand, works left to right on a text 
string that changes size like a rubber band. 
Other languages exhibit comparable 
differences. 

Mixed Cases and Variations 
(for the whimsical) 

There are a lot of mixed cases. A load and 
go compiler (such as WATFOR) is put into 






25 



the computer with the program, compiles it, 
and then starts it going immediately. An 
interpretive compiler looks up what to do 
with a given instruction by interpreting it 
into a series of steps, but compiling them 
instead of carrying them out. (A firm called 
Digitek is well known for making very good 
compilers of this type.) An incremental 
compiler just runs along compiling a com- 
mand at a time; this can be a lot faster but 
has drawbacks. 






A certain number of computer languages 
are very widely accepted and used; I list 
them here. If you want to learn any of them, 
I believe that Daniel McCracken has written 
a manual on every one of them. (Not the 
variants listed, though.) 

Why their names are always spelled with 
capital letters I don't know. (Generally they 
get let down in longer articles, though.) 

GMOM 

FORTRAN was created in the late fifties, 
largely by John Backus, as an algebraic 
programming system for the old IBM 704. 
(However, the usual story is that it stands 
for FORmulaTRANslalor.) 

Fortran is "algebraic," that is, it uses an 
algebraic sort of notation and was mostly 
suited, in the beginning, to writing programs 
that carried out the sorts of formulas that 
you use in high school algebra. It's strong on 
numbers carried to a lot of decimal places 
(scientific numbers) and the handling of 
arrays, which is something else mathema- 
ticians and engineers do a lot. 

Fortran has grown and grown, however; 
after Fortran I came Fortran II, Fortran III 
and Fortran IV; as well as a lot of variants 
like Fortran Pi ("irrational, and somewhere 
between III and IV"), WATFOR and 
WATFIV. 

The larger Fortrans, that is, language 
processors that run on the bigger computers, 
now have many operations not contem- 
plated in the original Fortran, including 
operations for handling text and so on. 

BASIC is in some respects a simplified 
version of Fortran. 



Algol ipst w n/i 

ALGOL is considered by many to be one 
of the best scientific languages; it has been 
widely accepted in Europe, and is the 
standard publication language in which pro- 
cedures for doing things are published in this 
country. It is different from FORTRAN in 
many ways, but a key respect is this: while 
in FORTRAN the programmer must lay out 
at the beginning of his program exactly what 
spaces of core memory are to have what 
names, in ALGOL the spaces in core mem- 
ory arc not given names except within 
subsections of the program called proced- 
ures. When the program gets to a specific 
procedure, then the language processor 
names the spaces in core memory. 

This has several advantages. One is that it 
can be used for so-called "recursive" pro- 
grams, or programs that call new versions of 
themselves into operation. I guess we better 
not get into that. But mathematicians like it. 

Originally this language was called IAL, 
for International Algebraic Language, but 
then as it grew and got polished by various 
international committees it was given its new 
name. (I don't know if anyone consciously 
named it after Algol, the star.) 

It has gone through several versions. Algol 
62, the publication language, is one thing; 
Algol 70, the 1970 version, is much more 
complicated and strange. 

Several versions of ALGOL have gotten 
popular in this country. One, developed at 
the University of Michigan, is called MAD 
(Michigan Algorithm Decoder); its symbol is 
of course Alfred E Newman. Another favor- 
ite (for its name, anyway) is JOVIAL (Jules' 
Own Version of the International Algebraic 
Language), developed under Jules Schwartz 
(and supposedly named without his consul- 
tation) at System Development Corporation. 
JOVIAL is big in the US Air Force. 

When IBM announced its System 360 
back in 1964, there had been hope that they 
would support the international language 
committees and make ALGOL the basic lan- 
guage of their new computer line. No such 
luck. Instead they announced PL/I (Pro- 
gramming Language I), a computer language 
that was going to be all things to all men. 

In programming style it resembled 
COBOL, but had facilities for varieties of 
"scientific" numbers and some good data 
structure systems. It is available for the 360 
and for certain big Honeywell computers; 
indeed, the operating system for MULTICS 
at Massachusetts Institute of Technology 
was written in PL/I. Whether there are 
people who love the language I don't know; 
there arc certainly people who hate it. 



26 



WtO\, IT ' 5 



Research and hobby types hate COBOL 
or ignore it, but it's the main business 
programming language. Your ' income lax, 
your checking account, your automobile 
license, all are presumably handled by pro- 
grams in the COBOL language. 

COBOL, or COmmon Business Oriented 
Language, was more or less demanded by the 
Department of Defense, and brought into 
being by a committee called CODASYL, 
which is apparently still going. COBOL uses 
mostly decimal numbers, is designed basic- 
ally for batch processing and uses verbose 
and plonking command formats. 

Just because it's standard for business 
programming doesn't mean it's the best or 
most efficient language for business pro- 
gramming; I've talked to people who advo- 
cate business programming in FORTRAN, 
BASIC, TRAC and even APL, But then you 
get into those endless arguments . . . and it 
turns out that a large proportion of business 
programmers only know Cobol, which prag- 
matically settles the argument. 

There are people who say they've dis- 
covered hidden beauties in COBOL; for 
instance, that it's a splendid language for 
complex pointer manipulation. That's what 
makes horse racing. 



JCL 



&"*e all ■! JfriBiciV* 

£>*t till if H'"t 



"After you study it for six months, it 
makes perfect sense. " — An IBM enthusiast. 

JCL is a language with which you submit 
programs to an IBM 360 or 370 computer. 
"Submit" is right. Its complications, which 
many call unnecessary, symbolize the career 
of submission to IBM upon which the 360 
programmer embarks. 



$n*pu 



SNOBOL is the favorite computing lan- 
guage of a lot of my friends. It is a 
list-processing language, meaning it's good 
for amorphous data. (It derives from several 
previous list-processing languages, especially 
IPL-VandCOMIT.) 

SNOBOL is a big language, and only runs 
on big computers. The main concept of it is 



the "pattern match," whereby a string of 
symbols is examined to sec if it has certain 
characteristics, including any particular con- 
tents, relations between contents, or other 
variations the programmer can specify; and 
the string substitution, where some specified 
string of symbols is replaced by another that 
the programmer contrives. [Who'll be the 
first person to simplify it and implement a 
microcomputer SNOBOL? . . . CH | 



Iltf 



LISP is probably the favorite language of 
the artificial-intelligence freaks. A fondness 
for LISP, incidentally, is not considered to 
reflect on your masculinity. 

LISP is a "cult" language, and its ad- 
herents arc sometimes called Lispians. They 
sec computer activities in somewhat differ- 
ent light, as composed of ever changing 
chains of things called "cars" and "cudders," 
which will not be explained here. 

LISP was developed by John McCarthy at 
MIT, based largely on the Lambda notation 
of Alonzo Church. It allows the chaining of 
operations and data in deeply intermingled 
forms. While it runs on elegant principles, 
most people object to its innumerable paren- 
theses (a feature shared to some extent by 
TRAC Language). 

Joseph Wcizenbaum, also of MIT, has 
created a language called SLIP, somewhat 
resembling LISP, which runs in FORTRAN. 
That means you can run LISP-like programs 
without having access to a LISP processor, 
which is helpful. 

TH«M / THWls WUtfJ> 

If you feel like making programs run fast, 
and not take up very much core memory, 
you go to machine language, the computer's 
very own wired-up deep down system of 
commands. It takes longer, usually, but 
many people consider it very satisfying. 

Then, of course, if you have a particular 
style and approach and set of interests, you 
will probably start building up a collection 
of individual programs for your own 
purposes. 

Then you'll work out simplified ways of 
calling these into operation and tying their 
results and data together. 

Which means you'll have a language of 
your own." 



27 



How to Build a Memory 
With One Layer Printed Circuits 



Don Lancaster 
Synergetics 



The 2102 static programmable random 
access memory is a fairly obvious integrated 
circuit to use lor a memory. It is easy to 
interface to just about any microprocessor 
or minicomputer. It costs from 0.1 to 0.3 
cents a bit, buying from ads in BYTE or 
from lots of other possible sources. 

What's not obvious is how you physically 
connect a group of eight or more 2 1 02s for a 
I K x 8 or larger memory. We have ten 
address lines, a write line, an enable line, and 
two supply runs that have lo go in parallel to 
each and every package. Al the same time, 
separate input and output leads have lo be 
provided in series for each different IC. 

One elegant and very compact layout 
method is to use double sided, plated 
through boards and leads routed between IC 
pins. The trouble with this method is that 
plated through boards are extremely expen- 
sive, and there's no reasonable way to 
manufacture them on your kitchen table. 
Worse yet, the plating of holes makes 
removal of soldered parts very difficult, and 
the close tolerances of routing leads between 
pins invites trouble from solder splashes. 
Using double sided boards without plate 
through holes is even worse, since you have 
lo solder top and bottom, and use of sockets 
or Molcx Soldercons gets very ugly, if not 
downright impossible. 

Single sided layouts, of course, are out of 



the question since they take far loo many 
jumpers. Or do they? 

Single Sided Layouts 

Here's a simple technique that lets you 
build virtually any memory you want, using 
easy home brew low technology single sided 
boards without routing connections between 
IC pins, using piggyback ICs, or similar 
hassles. You can use direct soldering, Solder- 
cons, or sockets per your choice. Whatever 
method you pick, the ICs are easy to install, 
lest, and replace. The only penalty this 
method has is that you pay around 50% 
extra in the way of board area. And believe 
it or not, all it takes is sax jumpers. And two 
of these are lor convenience and can be 
eliminated. 

The trick to all this is to pick very 
carefully what we call a jumper. Figure I 
shows line secret. Four of our "jumpers" are 
small strips of double sided PC board, 0.2 
inch (0.508 cm) high and 5 inch (12.7 cm) 
long. The foil is somehow selectively 
removed so thai each side touches the edge 
at only eight places. You can do this by 
etching, filing, carving, nibbling, scribing, 
chewing, routing, punching, notching, or just 
about any way that's convenient. Or, if you 
don't like using PC material for jumpers, you 
can use back lo back insulated metal strips 
(Rodgers bus strip style), or you can forget 



28 




Figure I : The secret of low cost single sided 
"no hassle" memory printed circuit layouts 
is jumper strips made from double sided PC 
material. Only four such jumper strips are 
required for the I K by 8 memory circuit. 
Pads on the printed circuit are arranged so 
that one electrical bus is connected to each 
side of the jumper strip. Electrical and 
mechanical connection of bus strips to the 
printed circuit is accomplished using fillets 
of solder. 



the whole thing and use a Vector wiling 
pencil or an Applied Solder-Wrapper. What 
you end up wilh is one jumper strip that 
does the job of 14 individual jumpers (seven 
on each side). 

Figure 2 shows us the schematic of a 
typical IK x 8 memory that uses 2102s. 
We've left it unbuffered for simplicity and 
low cost. Some background information on 
the 2102 is found in a separate box 
accompanying this article. 



Our I : I PC layout is shown in figure 3, 
along with the pattern for one side of a 
typical bus strip jumper. The board has 25 
mil (0.64 mm) lines on 25 mil (0.64 mm) 
centers and no routing between IC pins. 
With reasonable care, you should be able to 
handle this on a kitchen table PC lab setup. 
(I use a kitchen stove myself.) The output 
pins are conveniently grouped to a separate 
supply, address, data, and control runs as 
shown in figure 4. Two jumpers are used to 



To.i 



X 



C2 

O.I 



tilt 



— -•optional cs ground 



BUS STRIP 



I 

= JUMPER 



PIN 12 IC8 
PIN I I IC8 
PIN 12 IC7 



cm cm fo m <r 
u o u u o 



66666 



ooiioioiolc 



T6T5T4 



To|9 



(Jl CO f- li/l t- 



(0 m U <t 10 im 



1 

6 



ICI 
2102 



6666 



nn 



666666 



t 1 t i t I t i t i t 1 t i t i 

.— — rg cm ro ro <T *J- in in u> cDN N CD 00. 



IJoicDscflicltfKloJ 

q: < < < < <i <<< 



ADDRESS 



-►4 
-► 2 



Figure 2: Schematic of a 
I K by 8 Memory Module. 
This diagram shows one of 
the eight 2102 memory 
circuits; IC2 to IC8 are 
connected in parallel. 



29 




Figure 3: One to one PC Layout Pattern. The I K by 8 memory module can be fabricated at home using this 
pattern. The jumper strip silhouette is shown at the top of the figure. When drilling holes after etching, use 
the following sizes: #67 drill for the 128 IC pin holes; #60 drill for the four holes used to mount two bypass 
capacitors from +5 volts to ground; 0.0625 inch (1.5875 mm) drill for the 30 holes used to mount Molex 
connectors at the edge. 




Photo I : Rear View of the J K by 8 
Memory Board. This photograph 
shows how the printed circuit pat- 
terns of figure 3 are used to 
fabricate the memory. The four 
double sided bus strips required are 
soldered onto the board. The mass 
production of jumpers with this 
method saves time and effort in 
construction of the board. 



30 




Photo 2: Front View of the 1 K by 8 Memory Board. The Molex edge connectors run along the bottom of the board. In the 
hand printed notations on the connectors, arrows indicate the direction of data flow for the data pins numbered I through 8. 

line up the Chip Enable and Write pins in 
sensible places. Two 0.1 uF capacitors pro- 
vide supply decoupling. 

This particular layout is for 2102s, but 
you can easily use the same technique for 
2101s, 2111s, 2112s, 5101s, dynamic 
memory, or just about anywhere else you 
have to connect lots of parallel leads to a 
bunch of ICs. The edge connector layout has 
been set up for Molex sockets or socket pins 
on 0.1 56 inch (0.396 cm) centers. You can 
use the sockets at the bottom as shown in 
photo, or the pins can be set up for a 
stacked board arrangement according to 
your needs. 







OJ 




ro 




*r 




m 




<0 








00 


u 




o 




u 




V 




u 




U 








o 


— 








~ 




— 




— 




~ 








— 






























• 



I K X 8 STATIC RAM 



Sim! t T i T ♦ T ♦ M T J T llt|j 01 , IM j r i»ioiM-o 

+ o u — — c\jcvjroro^<j-tntfi<D<i>r~Na>coa:<<<<<<<<<< 



Using It 

The memory will need +5 volts at half an 
amp (much less if you use premium low 
power or CMOS RAMs). The ten address 
lines A0 through A9 select one of the 
available 1024 words. You can redefine 
these address lines any way you want. The 
only thing that's important is that each bit 
in the word sees the same address at the 
same time. Our special jumpers have done 



— v — 

DATA 



v 

ADDRESS 



Figure 4: Component Placements. This diagram shows the location of the 
eight integrated circuits, two power supply bypass capacitors and edge 
connector pins. The arrow (*) identifies the optional chip select jumper wire. 



31 



GND = ENABLE 
+ - DISABLE 













i— (Js)- 


-(l!? 






A7 


A8 




1 »A6 


A5 






1— (TV 


-(z 




♦■READ 
GND- WRITE 



INPUT ADDRESS 



STATIC RANDOM ACCESS MEMORY 2102 

This is a static random access memory organized 1024 x 1 in a 16 
pin package with separate input and output leads. Information may be 
rapidly read into and non-destructively read out of memory at system 
speeds. No clocking or refresh is needed. Storage is volatile with data 
being held only so long as supply power is applied. 

To read, pin 13 is given a low level and pin 3 is given a high level. A 
binary address applied to the ten input address pins will select an 
internal storage cell and output the data in that cell. 

To write, pin 13 is given a low level, and pin 3 is given a high level. A 
binary address is applied to the ten input address pins to select an 
internal storage cell. The write input, pin 3, is then brought low and 
returned high (a "write pulse"). All address lines must be stable 
immediately before, during, and immediately after the low state on 
pin 3. 

All inputs and outputs are TTL and CMOS compatible. The output 
will drive one TTL load. Making pin 13 positive will float the outputs 
and ignore write commands. Outputs from separate devices may be 
connected in parallel so long as only one circuit is enabled at a time. 

Access time varies with the manufacturer and the grade of the 
device. A 800 nanosecond read time and a 400 nanosecond write pulse 
is typical for a non-premium unit 

Supply power is 70 milliamperes or less, again depending on the 
grade of the device and the manufacturer. 

Note that input addresses may be redefined in any manner 

convenient for Circuit layout. [Reprinted from Chapter 2 of TVT Cookbook 
(Sams).] 



this for us already. Data goes in on the eight 
input lines and out on the eight output lines. 
The output lines are TTL compatible and 
drive one standard TTL load. These lines are 
tristate, so the chip selects can be used to 
control busing of multiple memory cards. 

If you have only one memory card, you 
can permanently ground the chip select with 
a jumper. If you have more than one, you 
have to be sure to ground and enable only 
one memory card at a time. The tristate 
memory outputs let you connect many cards 
in parallel, so long as you enable only one at 
a time. 

The WRITE input should normally be 
held high. To enter data into memory, 
briefly bring this input low. The minimum 
write time depends on the 2102 you're 
using. Typical minimum times range from 
300 to 700 nanoseconds. Check the data 
sheet for your particular IC. 

One very important detail you will want 
to watch for: Be sure all your address inputs 
are stable immediately before, during, or 
after a write pulse. If you try to change 
addresses while writing, certain internal loca- 
tions will get "flashed" during the internal 
decoding, and some unexpected data 
changes can result. 

The 2102 is set up for a separate input 
and output bus. If you are using a common 
IO system, you should consider 2101s, 
2111s, or 2112s instead. Otherwise, you can 
add an external bus transceiver such as an 
AMD 26S10, a Tl 75138 or a Motorola 
3443. A typical transceiver setup was shown 
in figure 7, page 17, BYTE No. 3. Note that 
several cards can share a single bus trans- 
ceiver so long as you ground only a single 
chip select at a time. Additional address 
inputs and a suitable decoder can be used as 
a card or a page select." 




A NEW COMPUTER STORE 

One of the latest additions to the ranks of 
computer retailing and service stores is The 
Computer Store, 120 Cambridge St, 
Burlington MA 01803. The store opened in 
late January, and initially carries the Altair 
line in addition to numerous related 
products and services. 

A Software Note from Processor Technology: 
FOCAL™ Language Release 

Effective February 15 1976 Processor 
Technology Corporation released a version 
of the Digital Equipment Corporation's 
FOCAL language implemented to run on 
8080 based microcomputers. FOCAL, a re- 
gistered trademark of DEC, is an interactive 



interpretive language similar to BASIC. In- 
cluded with the language are high level 
mathematical functions such as sine and 
tangent functions. 

Cost of a paper tape of the language's 
object code is $3 and is part of a nationwide 
dealer promotion package. A source listing is 
also available as a part of the package, with 
the conditions of distribution set by the 
individual dealer. 

Processor Technology has also released a 
resident Assembly Language Operating 
System, known as Software Package #1, 
which is available in source form for $3. 
Contact the factory or your local microcom- 
puter dealer for further details. 

Processor Technology is located at 2465 
Fourth St, Berkeley CA 94710. 



32 



P1 73 Wiring Pencil 

Both the hobbyist and the professional 
can save hours of wiring time with a new 
wiring pencil from Vector Electronic Com- 
pany. Designated the P173, the pencil elim- 
inates wire measuring, stripping, and 
forming. Average time to make a connection 
is only a few seconds. 

The "pencil" consists of a feather-light 
plastic housing, a replaceable bobbin con- 
taining 250 feet of 36 gauge wire, and a lip 
to guide and cut the wire. The wire is routed 
directly between terminals or component 
leads making three or more wraps wherever a 
connection is to be made. Correct tension is 
maintained by the finger and the wire may 
be cut with the tip when the run is com- 
pleted. Because the wire is insulated with 
polyurethane or nylon polyurethane, routing 
may be point-to-point without regard to 
possible shorting on intervening terminals. 
When heat is applied to the connection 
points with a fine-tipped soldering iron, the 
insulation melts, allowing a solder bond. 

We'd like to see a detailed photographic 
article on this method of interconnection, 
comments on the electrical properties of 
small wires, hints and kinks for the experi- 
menter. This method is another example of 
Vector's innovative interconnections work, 
and it is certainly one of the most attractive 
propositions for the hobbyist on a tight 
budget. 

The tool is available from Vector Electro- 
nic Company, Inc, 12460 Gladstone Av, 
Sylmar CA 91342, or from several sources 
catering to the hobbyist. 

MUSICOMP 76 

The school of Advanced Technology of 
the State University of New York at 
Binghamton NY 13901, under a grant from 
the National Endowment for the 
Humanities, is sponsoring a workshop in 
computer techniques for music research, 
July 7-23, 1976. 

Music historians, theorists, and analysts 
will be taught how to represent musical data 
in computer-readable form, fundamental 
concepts of computing, and PL/I. (The use 
of computers in musical composition will 
not be considered.) 

An intensive workshop (July 14—17) in 
the DARMS (Digital Alternate Representa- 
tion of Musical Scores) language and pro- 
gram support will be open to computer 
scientists, computer center personnel, and 
other interested persons even if they are not 
professional music scholars. 

For detailed information write to 
MUSICOMP 76 at the address above. 



GET FAMILIAR WITH 

MICROCOMPUTERS 
AT MICROCOST. 

The EBKA FAMILIARIZOR 
is a complete 
microcomputer system. 
No expensive terminal is 
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built-in to a single PC 
board, including a hexi- 
decimal keyboard and display. 

Easy-to-understand Hard- 
ware and Programming Manu- 
als guide you every step of the 
way. You will gain a practical 
knowledge of microprocessing, 
plus invaluable "hands-on" experi- 
ence. All at microcost. 

The heart of the EBKA FAMILIAR- 
IZOR is a MOS TECHNOLOGY 6502 
Microprocessor, an eight bit processor 
that can address up to 65K bytes of 
memory. On-board memory consists of 
1K bytes of RAM for user programs and 
two eight bit ports (one input and one 

output). A 256 byte monitor program, supplied in one 1702A 
erasable PROM, enables you to load, examine, run, debug and 
modify your own programs. Each function can be implemented 
at any address in memory. Breakpoints can be entered at any 
location in your program to display internal 
registers or branch to a separate routine. 

You may also expand the capabilities of your 
FAMILIARIZOR in easy, inexpensive stages. To store 
your own programs in PROM, the PC board is designed to 
accept three additional 1702A PROMS (768 bytes). A low cosi 
PROM programmer is also available. The system bus allows easy 
expansion. Add-on memory, interface and special function cards 
are available. 

Whether you're a beginner or an experienced engineer, EBKA 
offers you a microcost way to get familiar with microcomputers. 
Order your EBKA FAMILIARIZOR today. 





■ - ORDER FORM -. — — - — - - - 
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□ Complete 6502 
FAMILIARIZOR Kit $229 

□ Assembled $285 

□ IC Socket Kit $14.50 

□ Power Supply $58 

[~~l Check here if you wish to receive 

literature on the complete EBKA line. 

Oklahoma residents, add sales tax. 
Make payable and mail to: 



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Signature 



Name. 



INDUSTRIES INC. 

6920 Melrose Lane 405/787-3671 
Oklahoma City, Oklahoma 73127 



Address. 



City, State, Zip_ 



33 



Aargh! 



(or, How to Automate PROM Burning Without EML) 



DATA 0+ >- 
DATA I + >— 



MSB 



DATA 2 + >- 



DATA3 + >- 



ADDR PULSE, 



1^ f**<Jt 



7404 

2 JT 



Dl IC9 °' 
74 75* 

D2 02 



D3 03 



D4 04 

Gl G2 



Ejf 



7404 
3| ^ 4 _TL 






DATA 4 + >- 
DATA 5 + >— 



DATA6+>- 



DATA 7 + >- 



START PULSE ■ 



IC3 

8223 PIN I 



LSB 



T^> 



Gl G2 

Dl 01 

ICIO 

7475 

02 02 



D3 03 

D4 04 



Peter H Helmers 
79 Evangeline St 
Rochester NY 



"AO" 



• - AI" 



• "A3" 



\ INPUTS OF PROMS 
; TO BE 

PROGRAMMED 



-*'A4" 
-►"A5" 



A 6 



7474 PIN3 (SEE FIGURE 3, P67 OF NOVEMBER 1975 BYTE ) 



t_t 



-•■ SET INT- TO COMPUTER'S INTERRUPT 



Figure I: The word address for the PROM to be programmed may be easily 
set using a holding register loaded from the microcomputer through an 
output port. This register replaces the switches S4 to SI I in figure I on page 
67 of the November 1975 BYTE. In this figure, ADDRPULSE- is a negative 
going signal generated by the output port of the computer when valid data 
for the PROM address is present at the lines DATAO+ through DATA7+. 
After the bit to be programmed is set up as described in figure 2 of this 
article, the programmer is started by means of a microcomputer generated 
STARTPULSE- signal which replaces the PROGRAM/VERIFY switch (Sla) 
in the original schematic of figure 3 on page 67 of the November 1975 BYTE. 
(S1b is replaced as shown in figure 3 of this article.) When the programmer's 
cycle is done, an interrupt should be set by means of the SET/NT- line 
generated by the control ROM IC3 in the original design. If desired, the 
computer can verify the programmed bit by reading the output BIT- of the 
selected PROM line using the circuit shown in figure 3 of this article. 



I just received my copy of BYTE No. 3 
and quickly looked to find my article on the 
design of a PROM programmer. There it was, 
prominently featured on page 66. Oh well, I 
figured, hardware is always given lower 
priority that software. But then, I noticed an 
italic section of extensions and modifica- 
tions had been added to my final thoughts. 
What could be put after my final 
thoughts 1 .? 7 . 

I should not have read it. On the previous 
five pages was a design incorporating the 
glories of semiconductors, a design which 
was conceived to work well and reliably. 
And now this stranger, the editor of BYTE, 
had taken the liberty of suggesting modify- 
ing my design to use antiquated reed relays 
so that the programmer could be computer 
driven. Aargh! I believe that logic families 
work best if they are not mixed. Thus I 
submit the accompanying suggestions, in fig- 
ures 1 through 3, which will interface a solid 
state microcomputer to the solid state pro- 
grammer — using a solid state, not electro- 
mechanical, interface. The captions explain 
the modifications, so there is no need to 
elaborate any further on that subject. 

However, I have been thinking: EML 
(ElectroMechanical Logic, sic) has some 
virtues. After all, it's well accepted and 
proven in the past several decades (new- 
fangled bipolar logic is only 15 years old). 
And EML has tremendous noise immunity — 
both because of its high voltage swings (as 
much as 48 volts or more) and slow speed (it 
is totally immune to high frequency — great- 
er than 1 kHz — noise). Finally, it offers 
large scale packaging. 

Not being one to buck a winning trend, I 
offer the following ideas concerning EML. 
Once you have built the electromechanical 
interface to the PROM programmer, it will 
be easier to build your massive computer 
using EML, since you do not have to inter- 
face between logic families. I recommend a 
16 accumulator machine architecture with 



34 



electromechanical indexed addressing. There 
are some good surplus buys on latching 
relays which you could use for memory. The 
program counter can be created from a 
stepping relay. However, limit possible jump 
instructions, since branching with a stepping 
relay may give rise to problems. And do not 
forget about mass storage. What is a disk 
read only memory, but a round piece of 
plywood mounted on a 33-1/3 RPM spindle 
and drilled out whenever you want a bit set 
to "1 ". A microswitch read head can be used 
to detect the presence or absence of holes. 
Finally, do not forget about the mechanical 
marvel that fits perfectly into this system — 
the good old Teletype! ■ 



7474 

PINS 

V 



ICMi 

7404 

II N. 10 



|> 



H<>- 



FROM 
CURRENT 
SOURCE i 
"P'TERMI 
OF SIB 



NAL >- 






ICI7 
75450 



Ji'fu. 



DATA *- 
DATA I + - 
DATA 2+ - 
DATA 3 + - 



Dl 01 

ICI2 

'75 
D2 02 



D3 
D4 



Gl G2 



03 
04 



XL 



SELECPULSE- 



BP 



TO PINS 5 8 10 OF ICIS THRU 
1C 16 IN FIGURE 2 






G CI C2 
Al 

ICI3 

75450 



6 i f if S0+- I -\ 

► 00 



12 

P 

9 ififSI-f 



S2+ 2 



ICIIc 
7404 



note: 
software must guarantee that 
only one of the bits s0+ ,si+ , 
s2+---s7+ is logical i during 
a program cycle. 



HI+ s .[' t " 

iiJO 10 



ICI4 
75450 



El 
Yl 
Bl 
Y2 
B2 
E2 



6 >,IfS2»l 



3 

12 

P 

"9 i f if S3+- 



ICIld 
7404 



S4 + 



y> 



XL 



DATA 4 + ■ 
DATA 5 + • 
DATA 6 + - 
DATA 7 ♦ ■ 



13 



Dl Gl G2 01 

D2 02 

IC I 3 

'75 

D3 03 

D4 04 



S5+ '3 



H1+ yj 



TO OUTPUTS 
) OF PROM TO BE 
PROGRAMMED 



G CI C2 

Al 

ICI5 
75450 



S 



"9 i f ifS5+-l 



•05 



I ' fuse 

T A 



ICI6 
75450 



El 
Yl 
Bl 
Y2 
B2 
E2 



6 if If S6+ - I 



12 



"v" 

TERMINAL 
OF SIB 






BIT- 
INPUT PORT 
COMPUTER 



Figure 3: This circuit shows how 
the 75450 integrated circuit can 
be connected as a solid state 
replacement for Sib. What was 
the "V" terminal of Sib now 
goes to a 7404 buffer and is 
available as the signal BIT- which 
may be read by a one bit input 
port for verification purposes. 
The switching is controlled by 
the state counter enable flip flop 
(7474 IC4, pin 5). When this pin 
is low, transistor B conducts so 
that the selected output is 
available at BIT-. When IC4 pin 
5 is high, transistor A conducts 
so that the fusing current 'fuse & 
applied to the selected output 
pin through one of the 75450 
sections in figure 2 of this 
article. 



Figure 2: Data bus bits DATAO+ through DATA 7+ are strobed into an output bit selection 
register by the microcomputer generated SELECPULSE - signal. Only one output should be 
selected (data bit set to logical one by the program) at a given time. The 75450 integrated 
circuit acts as a dual SPST switch to connect the if use line to the selected PROM output and 
thus allowing verification and/or programming via the circuit of figure 3. 



35 




The SR-52: 

Another World's 



The HP-65. 



J Bradley Flippin 
5044 Park Rim Dr 
San Diego CA 92117 



Using the parenthesis form 
of algebraic notation, the 
calculator's hardwired 
software analyzes the 
problem as stated in a 
"natural" form. 



Infix notation has opera- 
tors written in between 
two operands. 



Postfix notation finds an 
operator following nota- 
tion of two operands. 



On September 16 1975 Texas Instru- 
ments announced the latest entry in their 
series of sophisticated pocket calculators, 
the SR-52, exactly 20 months after Hewlett- 
Packard announced their HP-65 fully pro- 
grammable unit. Richard Nelson described 
the HP-65 in the December 1975 issue of 
BYTE. The purpose of this article is to 
provide some additional information on the 
new SR-52 and to provide a comparison to 
the HP-65. 

To the casual observer the two units look 
very similar. Both are of the hand held 
variety, packing a tremendous amount of 
logic and memory into a small package. The 
SR-52 weighs in at 12.3 ounces while the 
HP-65 weighs only 1 1 ounces. One of the big 
differences is the retail price. As of this 
writing, the SR-52 retails for $395 while the 
HP-65 retails for $795 (although it can 
sometimes be obtained for $695 if one looks 
hard enough). 

Notation 

Other than the differences in price and 
keyboard (which will be discussed later), the 
other big difference is in their logic systems. 
Hewlett-Packard uses Reverse Polish Nota- 
tion (RPN) in their line of pocket calculators 
while Texas Instruments has stayed with the 
algebraic (or infix) notation used by the rest 
of the calculator industry. It is interesting to 
read the literature because each company 
sets forth a very convincing case for its own 
system. Texas Instruments put it this way in 
their SR-52 flyer: 



To the casual observer, the 
HP-65 and the SR-52 look 
very similar; the big dif- 
ference is in their logic 
systems. 



"And to make it more confusing, a 
good case can be made for both by the 
careful selection of sample problems. 
In truth there is no ultimate answer. 
Either system can be operated with 
ease by the experienced owner. And 
either can be a boon to the simple 
solution of the most complex prob- 
lems. Many practiced users of RPN 
now swear by it. But owners of alge- 
braic machines can find RPN awkward 
and confusing. It boils down to indi- 
vidual preference." 
Hewlett-Packard has an excellent paper 
comparing the two systems from their point 
of view; it's entitled "ENTER vs EQUALS" 
(Publication 5952-6035). There is no 
answer, as Texas Instruments has pointed 
out, because both systems get the job done. 
As a result, this is sure to be one of those 
topics that will keep their respective advo- 
cates trying to "convince" each other for 
years to come. 

What are the main differences between 
the two logic systems? For the benefit of the 
reader, it might be well to spend a few 
moments describing the two systems (some 
say there are actually three systems because 
the algebraic system has two variations). 

Algebraic (Infix) Notation 

The simplest system for the novice is the 
algebraic system because it is the notation 
the average person has been taught in school. 
It is also known as infix notation. It is based 
on solving a problem in exactly the way it is 



36 



Small 



commonly written. For example, let's solve 
the problem 5 + 4 = ?. The operator keys the 
data in exactly the way it is shown. He 
pushes "five", "plus", "four" and then hits 
the "equal" key and the answei appeals in 
the display register. In reality the calcula- 
tor's program maintains two internal regis- 
ters, one of which is displayed. Pressing the 
first (five) key enters the data into the 
display register. Pressing the second (plus) 
key transfers the data to the second register 
which is also known as the accumulator. At 
this point the number "five" is in both 
registers and an internal switch has been set 
telling the logic that the next number is to 
be added to the accumulator when the time 
comes for the next arithmetic operation. 
The second number (four) is now entered 
into the display register. At this point the 
accumulator contains a "five"; the display 
register contains a "four" and the "plus" 
logic is set. To get the answer the operator 
simply presses the "equal" key which tells 
the logic circuits to perform the pending 
operation on the data in the accumulator, 
place the results in the display register and 
clear the preset function logic. Chain ma- 
nipulations are possible by simply pressing 
another function key. Thus, the process can 
go on indefinitely. For example: 5 + 4 = 9 x 
2= 18-8= 10 (etc.). 

The operator can accomplish the same 
task more easily by eliminating the "equal" 
key each time. After "five", "plus", and 
"four", the operator could press the "plus" 
key directly. The same sequence described 




above will take place, except that the "plus" 
logic will again be set (actually, any function 
could be pressed). Thus, chain manipulations 
are possible in this way, also. For example: 5 
+ 4x2 — 8= will provide the same results 
(10), but the number of steps needed is cut 
by two. 

This is simple algebraic logic in that it 
does not use parenthesis to determine the 
precedence order from the entered data. A 
modification to the algebraic notation can 
be made by adding parentheses to help 
define the problem. For example: The prob- 
lem 5x3 + 4 using simple chain manipula- 
tions will result in an answer of 19. How- 
ever, if the operator wants to perform the 
summation first, then he would have to set it 
apart by parenthesis in this manner: 5 x (3 + 
4). Now the answer is 35. Note also that the 
same result could have been obtained by 
rearranging the problem to read: 3 + 4x5. 
Now simple algebraic chain manipulation 
will result in an answer of 35 because the 
summation is performed first. 

Parenthesis processing requires additional 
internal registers to hold the intermediate 
results. However, the process is similar to 
that described for the simple algebraic sys- 
tem. The only difference is that when the 
operator keys in the parenthesis, it tells the 
logic to "hold off" on the chain manipula- 
tion process until the matching parenthesis is 
found. 

One might wonder why parentheses are 
needed because simple inspection of the 
problem will tell the operator that he must 



Photo I: The SR-52 Cal- 
culator. Like Its cousins in 
the microcomputer and 
large computer world, the 
SR-52 has magnetic 
recording features allowing 
the user to purchase and 
build a library of software. 



A key to economical stor- 
age of programs in these 
small programmable 
machines is use of merged 
operations — two key- 
strokes which are stored as 
one location in memory. 



These programmable cal- 
culators must surely be the 
ultimate in compactness 
and ingenuity in packag- 
ing. 



37 



do the "internal" portions of the problem 
first The use of parentheses to some extent 
eliminates the need for such an analysis, 
leaving the breakdown of the problem to the 
internal logic. It does this through an inter- 
nal precedence of calculations called the 
hierarchy of operations. There is no hier- 
archy in simple algebraic systems, because 
the logic simply processes the data as they 
are entered through chain manipulation. 



A question one always asks when paren- 
theses are encountered is how deeply may 
they be nested? (Remember, each paren- 
thesized level in the problem requires addi- 
tional internal storage for intermediate 
results). Some systems go four or five levels 
deep. The SR-52 is capable of nesting to 
nine levels. The following example illustrates 
the maximum capability of the SR-52 in this 
area: 



6 x (9 + (6 x (12 t (3 x (8 x (2 x (6 ^ (6 x (6 + 2))))))))). 




Figure I : An example of the HP-65 operations stack in use. This chart shows 
numerical contents of the stack elements X, Y, Z, and T while calculating the 
problem (3 x 4) + (5 x 6). The HP-65 uses Reverse Polish Notation to 
calculate the result, using the keystrokes shown. 

Table I: Detailed Comparisons. This table shows specific comparisons 
between the HP-65 and the SR-52 in areas of programming capability, 
calculating capability and operating characteristics. 



Programming Capability 


SR-52 


HP-65 


Program steps 


224 


100 


Merged prefixes 


all 
merged 


stack and 
comparison 


Merged store and recall instruction 
codes 


no 


yes 


Program read/write 


yes 


yes 


User-defined function keys 


10 


5 


Possible labels 


72 


15 


Absolute addressing 


yes 


no 


Subroutine capability 


yes 


yes 


Subroutine levels 


2 


1 


Program flags 


5 


2 


Unconditional branching 


yes 


yes 


Conditional branching decisions 


10 


7 


Indirect branching 


yes 


no 


Editing 






Single-step 


yes 


yes 


Back-step 


yes 


no 


Insert 


yes 


yes 


Delete 


yes 


yes 


Single-step program execution 


yes 


yes 


Optional lock-in printer 


yes 


no 



Straight chain manipulation, disregarding 
parentheses, will yield a result of 3458, 
which is incorrect. The correct answer is 4.5. 
It should be noted that the parenthesis 
count does not include expressions that have 
already been terminated. For example: 6 x 
((5 + 7) t (6 x 9)) is not three deep, but 
only two deep because the first expression 
(5 + 7) was terminated by the first right 
parenthesis, ")", prior to encountering the 
second expression (6 x 9). Internally, each 
level of parentheses is like using one level of 
the stack in a Reverse Polish Notation 
machine. 

Reverse Polish Notation 

The second logic system is known as 
Reverse Polish Notation (RPN). The Polish 
mathematician Jan Lukasiewicz wrote a 
book published in 1951 on formal logic 
wherein he was the first to demonstrate that 
an arbitrary expression could be shown 
unambiguously without the use of paren- 
theses by placing the operators immediately 
in front of or after their operands. For 
example, (a + b) x (c - d) could also be 
expressed as x + ab — cd (keep in mind that 
ab is a logical notation and does not mean 
multiplication but shows only the sequence 
of the data). This is a prefix type of 
notation. It could also be reversed to provide 
a postfix type of notation as follows: ab + 
cd — x. (Now you know why the algebraic 
system in common use today is called infix 
notation, since the operators arc in the 
middle between operands). As a result of 
this discovery, both prefix and postfix nota- 
tion have become widely known, respec- 
tively, as Polish and Reverse Polish Notation 
in Lukasiewicz's honor. 

Reverse Polish Notation, as mentioned 
above, does not utilize parentheses. As a 
result, the solution to problems using this 
type of logic must be approached in exactly 
the same manner as with any computer 
program because it is the same logic used in 
all large (and nowadays, small) computer 
systems. The programmer moves his data 
around into various registers and then, once 



38 



it is where he wants it, he executes the 
required arithmetic operation. 

Hewlett-Packard has arranged its working 
registers into what they call an operational 
stack. It consists of four registers designated 
X, Y, Z and T. A fifth register is called the 
LAST X register and is a recent addition to 
the HP line, although it is not directly a part 
of the stack itself. The LAST X register 
holds the last data entry in the event the 
operator wants to either see what it was, 
wants to use it again, or wants to extract it 
from the solution (i.e., entered the correct 
data but pushed the wrong function. The 
operator simply presses LAST X, the inverse 
of the previous function and then the 
correct function). 

The four operational stack registers have 
special functions and operate as an inte- 
grated group. The X register is the data entry 
register and is the only one that is displayed 
(For those who have used the HP-91 00/981 
series, they displayed the X, Y and Z 
registers simultaneously). All of the trigono- 
metric and some of the transcendental func- 
tions are performed directly in the X register 
(i.e., 1 n x). The Y register can be thought of 
as the accumulator. All mathematical opera- 
tions are performed in this register. Those 
transcendental functions which require two 
registers use both the X and Y registers (i.e., 
y x ). The Z and T registers are temporary 
storage registers and no mathematical opera- 
tions can occur in them. Data are moved to 
and from them as required during the 
solution. 

If one uses a concept such as an opera- 
tional stack, it sometimes proves necessary 
to move the data around within the stack. 
To perform this function, Hewlett-Packard 
has designated a special set of data move- 
ment keys which do not appear (nor are 
they required) on the SR-52. For example, 
ROLL UP and ROLL DN allow the contents 
of the stack to be shifted up or down one 
position (in much the same manner as a 
circular shift or rotate instruction). When 
shifted up, the data in the T register goes 
into the X register and vice versa. The 
ENTER (or UP) key literally pushes the data 
up. Thus, the contents of all registers are 
moved up one, with two exceptions: The 
original data stays in the X register and the 
data in the T register is destroyed by the 
data from the Z register. As a result, if the 
operator desires, the same number can be 
placed in all registers by pressing the 
sequence: (data)(UP)(UP)(UP).* Figure 1 is 
an example of the use of an operational 
stack for the problem (3 x 4) + (5 x 6). The 
ENTER (t) key breaks up the solution by 
moving the intermediate data up into the 
stack where it is saved until needed. In 



Table 1 (continued): 

Calculating Capability 



SR-52 



HP-65 



log, Inx 


yes 


yes 


10 x ,e x 


yes 


yes 


X 2 


yes 


yes 


^ 


yes 


yes 


V7 


yes 


no 


y X 


yes 


yes 


1/x 


yes 


yes 


x! (factorial) 


yes 


yes 


Trigonometric functions 


yes 


yes 


Degrees-minutes-seconds to decimal 
degrees conversion 


yes 


yes 


Degree, minute, second arithmetic 
(+, -) 


no 


yes 


Degree/radian conversion key 


yes 


no 


Polar/rectangular conversion 


yes 


yes 


Octal conversion 


no 


yes 


Absolute value 


no 


yes 


Integer, fraction part 


no 


yes 


Built-in 7r value precision 


12 digits 


10 digits 



Operating Characteristics 



Angular modes 


2 


3 


Fixed-decimal option 


yes 


yes 


Calculating digits 


12 


10 


Digits displayed (mantissa + exponent) 


10+2 


10+2 


Data memories 


20 


9 


Memory arithmetic (+, — , x, -r) 


yes 


yes 


Exchange x with y 


no 


yes 


Exchange x with data memory 


yes 


no 


Entry mode 


algebraic 


RPN 


Max. number of pending 
operations handled 


10 


3 


Number of keys 


45 


35 


Indirect memory addressing 


yes 


no 



addition, the HP-65 has a special feature of 
automatically inserting an UP function prior 
to any data entry that follows a functional 
operation. This can be seen between steps 
four and five in figure I. Notice that the 
intermediate result (12) moved up auto- 
matically as the five was entered. The 
operator must, however, ensure that he does 
not move up more than three intermediate 
results, which is the HP-65's limit (without 
using the data storage registers). In com- 
parison, the SR-52 can handle up to ten 
pending operations. 

As a further assist in manipulating data in 



•NOTE: For examples of key- 
stroke sequences, the key 
name or a description of input 
(such as "UP") is enclosed in 
parentheses. 



39 




And Now, a Printer for the SR-52 

On January 7 1976 Texas Instruments Inc, Calculator Products Division, 
announced the new PC-100 print cradle for the SR-52 calculator. The 
product is a desk top unit with a 20 character per line thermal printer using 
2.5 inch (6.35 cm) thermal printing paper available in roll form. The PC-100 
interfaces to the calculator and expands capabilities to include program listing 
and execution trace capabilities. The listing allows a permanent human 
readable record of the program to be made automatically; a trace documents 
each calculation step of a program as it is performed. An extra feature is that 
the calculator can be locked into the base provided by the printer, making the 
entire system less likely to be pocketed by unscrupulous individuals. All this 
function is available for only $295, and the unit will be sold through the 
usual Tl calculator distribution channels (direct mail and retail stores). 

For further information on the PC-100, contact Texas Instruments Inc 
PO Box 5012, Mail Station 84, Dallas TX 75222 (Attn: PC-100). 



the stack, the HP-65 has an EXCHANGE X 
AND Y key (x O v) which allows the 
operator to interchange the contents of 
these two important registers. This is handy 
when encountering operations where 
ordering of operands is vital, as in division. 
Using this operation, it is also possible to 
reverse the sequence of the data in the entire 
stack: (xOy), (ROLL UP), (ROLL UP), and 
(xQy); (ROLL DN) could have been used, 
if desired. 

Function Selection 

The next area of interest is the keyboard 
itself. The SR-52 has 45 keys where the 
HP-65 has only 35 keys. Both machines use 
the "second function" type of system which 
allows one key to have two meanings. The 
SR-52 uses the symbol "2nd" while HP uses 
"f". In addition, the HP-65 also has a "third 
function" key designated "g" which allows 
all of their keys to take on a third meaning. 
Both units have an inverse function key 
designated INV on the SR-52 and f — ' on 
the HP-65. This is handy for finding the 
ARC SIN of a number. The operator simply 
presses: (2nd) (SIN). A comparison of the 
photographs with this article will reveal 
other differences in the keyboard layouts. 

Operation Codes 

The key to economical use of storage in 
this type of machine is the application of 
merged operations which allow one storage 
location to accept a prefix, when required, 
along with an associated instruction code. 
This is possible in both units; however, only 
the HP-65 allows merged storage and recall 
instructions. A practical relationship 
between the two programming systems can 
be obtained by using the problem on page 
74 in the HP-65 Owner's Handbook as a 
comparison. It is a financial interest problem 
containing 22 storage and recall instructions. 
The problem requires 68 memory locations 
in the HP-65, while in the SR-52 (neglecting 
any translation due to logic systems, which 
is left to the reader as an exercise), it would 
require 90 memory locations. The difference 
is due to the SR-52's lack of merged storage 
or recall instructions. This may be one of the 
reasons Texas Instruments made their pro- 
gram memory over twice as big as the 
Hewlett-Packard's. 

Both units use a similar method of 
designating their decimal numeric instruc- 
tion (or operation) codes. With the excep- 
tion of the digit keys, the instruction codes 
for any key on either unit can be found by 
simply counting down the left column to 
that row and then counting across to the 
particular key. Thus, on the SR-52, the 



40 



instruction code for Enter Exponent (EE) is 
52 while the same function on the HP-65 
(EEX) is 43 (this can be verified from the 
two photographs). The digit keys retain their 
own values (i.e., one is 01, two is 02, etc.). 

Comparisons? 

There are so many features of both units 
that it is difficult to say any one of them is 
the big feature; however, the fact that they 
can both record and read programs on small 
magnetic cards certainly ranks high on the 
list. A detailed features comparison is found 
in table 1. Because of the SR-52's large 
memory, it requires two passes to read or 
write the card. The card is inserted in the A 
direction first and then turned around (not 
over, as the oxide must remain face down) 
and the B side is entered. Both units contain 
a recessed card holder between the display 
and the five special function keys which are 
labeled A through E. The cards have an area 
upon which the operator can write to 
designate the functions of the special keys 
for customized programs. In the case of 
pre-recorded programs, the data elements are 
also pre-printed on the cards as can be seen 
in the photograph. 

Last, but not least, is the one big feature 
of the SR-52 which is not yet available with 
the HP-65 system. In early 1976 Texas 
Instruments intends to market the PC-100 
which is an optional desk top lock in printer 
for use with the SR-52. It looks like a 
regular desk calculator with the typical 
adding machine type tape printing unit on 
the left and a space on the right for the 
SR-52. The unit includes a key lock so the 
calculator cannot be "lost." It will allow the 
user to list out entire programs, print the 
results of calculations, and advance the 
paper. These functions are already on the 
SR-52's keyboard as second functions 
(LIST, PRT, and PAP, respectively). 

This short article has not covered all 
points of comparison between the two cal- 
culators. As can be seen from table 1, there 
are many areas that have not been discussed. 
The purpose has been to inform you about 
these two interesting computer systems. 
However, if you feel teased and want to 
investigate these fascinating machines 
further, the manufacturers would love to tell 
you where you can see them in your 
community. Both have toll free (WATS) 
numbers you can use: Texas Instruments 
(800) 527-4980 (in Texas (800) 492-4298] , 
Hewlett-Packard (800) 538-7922, ext 1000 
(in California (800) 662-9862|. These pro- 
grammable calculators must surely be the 
ultimate in compactness and ingenuity in 
packaging." 



What good is o 
Micro-Computer 
if you con* I 
moke it work? 




Startup time on micro-computers can be a real problem. We know that. That's 
why we've developed The Micro-Designer. The first complete package of hard- 
ware, software and educational materials. All with one purpose: to speed micro- 
processor system design. 

How? By providing the only microprocessor test and development system with 
solderless breadboarding capabilities. At its heart: the Intel 8080A processor 
chip, providing all signal functions. A front panel that monitors functions of the 
microprocessor and allows data I/O with or without an asynchronous terminal. 
Up to 65 K memory. And the Bugbooks, E&L's innovative approach to self- 
teaching micro-electronics. 

And, when you're ready for your final system, you use the same modules and 
cards that you learned on. So experiment. Design. Test. Because now there's 
a system that's caught up with imagination. The Micro-Designer from E&L 
Instruments. Squander a minute now to write us about it; we'll send you full 
Information. And maybe save you weeks of work. 



P 

D 



E&L INSTRUMENTS, INC. 

Circuit Design Aids 
61 First Street, Derby, Ct. 06418 (203) 735-8774 



41 



Controlling External Devices 
With Hobbyist Computers 



Robert J Bosen 

Box 93 

Magna UT 84044 



There is an almost infinite variety of uses 
to which a hobbyist computer system may 
be applied besides calculating or data 
processing, and many of these can bring a 
great deal of satisfaction to the proud 
owner. For example, hobbyist microcom- 
puters are invariably advertised with a long 
list of possible applications such as home 
security systems, light controllers, process 
controllers, or automated drink mixers. I 
have personally had several opportunities to 
use my computer in a variety of related 



Photo 7 : The author's computer setup includes the two CRT terminals shown 
on the table, plus a rack cabinet presently containing his central processor. 






• fc - 




ways, including controlling stage lighting and 
sound effects for a large bicentennial cele- 
bration, and automating a spook alley. These 
and other applications inspired me to build 
the module described here to interface my 
computer with virtually any electrical or 
electronic device. If you build this interface 
as I did, you'll be able to control up to 16 
channels of electrical outlets or switches of 
any kind, and only your imagination will 
limit the applications. 

The basic principle behind any computer 
interface is to change computer compatible 
signals to device compatible power levels, 
and this interface accomplishes that goal 
with a great deal of flexibility, allowing the 
user to hook up virtually any type of 




42 



ALL 7474 



5 BITS OF 
OUTPUT DATA { 
FROM CPU 



DO> — 
Dl>- 
D2> — 
D3> — 
I D4>— I 



Gl 
G2 




G 
74154 



I ALL 7474 



[12 

2 II 



D 

C H o 



H 



13' 



[12 

4 II 



D 

C ■ J 

CLR 



13' 



D 

K 
C 

CLR 



13 



[12 

8 II 



D 

C L Q 

CLR 



13 



lit 

10 II 



D 

C M O 



Li 

13 II 



D 

C N o 

CLR 



14 FT"- 



DO 



D 

C p 

CLR 



16 13C 



_8_ 
9 t 



17 II 



D 

C 




CLR 



D Q 

COO 

CLR 



W f— I QI4 I 



■WV -fH 016 1 




Figure I: This is all you'll need to build if you already have a parallel output port you can use 
to control the interface card. If not, lines DO through D4 should be joined with the 
corresponding points in figure 2. Transistors Ql through Q16 can be any economical NPN with 
reasonable Beta. Due to varying configurations (you may not want to build up all 16 channels 
or use different transistors), I suggest the card be wirewrapped. 



transistor, relay, or small electrical device to 
its open collector outputs. I used 16 surplus 
relays and wired them to 16 AC outlets and 
16 sets of "five-way" binding posts. But this 
is by no means the only way to utilize the 
16 output channels provided. All in all, the 
system described allows the programmer a 
great deal of flexibility over what he will 
control and how he will do it. 

This interface may be used with virtually 
any 8 bit computer, and could be modified 
to work with a 4 bit machine as well. The 
circuit consists of four parts: A parallel 



output port, a 16 channel demultiplexer, a 
16 bit memory, and 16 single transistor 
driver amplifiers. It can be built on a single 
small circuit board and total cost for all the 
solid state parts will be under $35 if a little 
shopping around is done. If you already have 
a spare parallel output port you can dedicate 
to this purpose, you can save about half of 
that cost. 

Here's how it works: A byte of data is 
sent out of the computer to the parallel 
output port where it is latched. The four low 
order bits are applied to the four inputs of 



43 



the 74154 demultiplexer which selects one 
of 16 output pins and pulls it low. If, for 
example, the four bits are 0000, the de- 
multiplexer will select channel zero and pin 
1 will go low. There are 16 possible com- 
binations of data that may be received, and 
for each of these combinations one of the 
pins of the 74154 will go low. Each of the 
16 outputs of the demultiplexer then goes to 
a D flip flop which it toggles. Since we are 
trying to exercise control over 16 channels 
continuously, but the 74154 can only 
process one channel at a time, these D flip 
flops are needed to store the status of all 
inactive channels. Toggling the flip flops 
causes them to reverse their state and 
alternately turn on or off the transistors 



IN>- 
OUT>- 



-JUMPERS FOR ADDRESS SELECTION 
7404 



AO >- 



H>i 



a, y 



$>°1 



A2> 



-Ia>O^|740 



A3> 




A4>- 



1 — ^J>V 



«> 



u»* 



A6>- 



17400 P-* 



7404 



^?K-^> 



A7>- 



17400 



=>WR )> ID^O- 



DO 0>- 
DO I >- 

do 2 y- 
do 3 y- 

00 4)- 
D0 5 )- 

do 6 y~ 

D0 7>- 




OPTIONAL 
NPUT P0PT 
•■ ENABLE 

(FOR FUTURF 
EXPANSION] 



INTEL 
8212 



VCC* 24 
GND> 12 



— » no 



-»" Dl 
_» n2 

-► D3 

— » D4 



they drive each time a particular channel is 
selected. The fifth bit of the data byte is 
buffered (ICD) and then runs to the reset 
inputs of all 16 D flip flops, providing a reset 
signal to turn all the channels off simul- 
taneously. (The three high order bits are 
unused.) 

Hardware. The circuit provides 1 6 transis- 
tors in an open collector configuration, 
which may be viewed as open switches when 
off, and as switches shorted to ground when 
on. Each transistor can handle about 30 V 
and 30 mA. These may be used to control 
bigger transistors, or relay coils may be 
energized through them, or small electronic 
devices (sirens, light bulbs, etc.) may be 
powered directly with them by placing a 
voltage source in series with the device and 
the transistor. This is shown in several 
variations in figure 3. A word of caution is in 
order here if inductive loads such as relay 
coils are used: The collapsing magnetic field 
of the relay coil as it is turned off can 
generate large voltage spikes which may 
damage the transistors. Relay coils (see 
figure 3a) should therefore be protected 
with shunt diodes to short out these spikes 
when they approach dangerous levels. Relays 
may also oscillate at high frequencies if 
selected frequently in a program, so small 
capacitors may be necessary across the 
windings to short these oscillations to 
ground. From my own experience I found 
about half the surplus relays I tried exhib- 
ited this problem, but tinkering with various 
small capacitors clears it up. 

Software. The software must provide data 
bytes containing the right information to 
select the right device at the right time. This 
will require a little forethought from the 
programmer because of the nature of the D 
flip flops used to store the status of each 
channel. Returning to the preceding discus- 
sion on circuit operation, it will be recalled 
that the D flip flops toggle (reverse states) 
each time they are selected. However, simply 
selecting the same channel over and over 
again will not. toggle it on and off as it might 



Figure 2: This is a standard parallel output port, capable of responding to any output address 
between zero and 255. The address is specified by the eight jumpers coming off the address 
lines. You may want to use low power chips (74L series) for IC A, IC B and IC C, to save on 
address bus loading. Incidentally, this addressed output port could be used in any application 
requiring a parallel output. All eight data lines are available at the various outputs of the 8212 
chip. The IN and OUT and PWR inputs are for Altair 8800 and similar computers. The 
OPTIONAL INPUT PORT ENABLE line coming from pin 8 of IC B may be used to enable 
another 8212 chip with the CS pin to function as an input port and place data on the input bus 
when the IN line is active and the specified address is enabled. 



44 




Photo 2: Details of the output control interface. The interface was built upon perforated board 
mounted at the side of the rack cabinet at the left. 



be expected, because the D flip flops only 
toggle on rising edges from the demulti- 
plexer, and a rising edge only occurs after a 
channel has been selected when the multi- 
plexer changes to select (ground out) a 
different channel. So, turning a channel on 
and then off is accomplished by first select- 
ing the desired channel with a data byte, 
then selecting a different channel (This 
might be an unused channel or the next 
sequential channel in your program), then 
waiting the delay needed for the first 
channel \o switch on, then selecting it again 
to reset it. This may seem a little compli- 
cated at first, but it's easy to get used to. 

Applications. Software and hardware will 
of course be determined by the application 
needed, and this will vary widely from 
instance to instance. The following ideas 
have occurred to me and you will un- 
doubtedly think of many more: Light 
shows, computer music, industrial process 
control, computerized games, industrial 
robots, stage lighting, spook alleys (Electro- 
Spook?), slide presentations, darkroom auto- 
mation, chemical mixing, remote controls of 
any type, or a fully programmable electri- 
cally operated teeter-totter. Try it — you'll 
like it!" 



3a 



CONTROL 
RELAY 




-^WV — f— [ 01 I 

3 b. rn 



RELAY 

SUPPLY 

VOLTAGE 



^h 



f 




EXTERNAL 

POWER 

SUPPLY 



"7h 



2N3055 OR OTHER 
NPN POWER 
TRANSISTOR 



AT^ 



HIGH CURRENT 
OUTPUT 
(INVERTED 
LOGIC) 




Figure 3a: Interfacing re- 
lays. Z; is used to protect 
Qj from spikes. Zj should 
have a breakdown voltage 
just higher than the relay 
voltage. 

Figure 3b: Power transis- 
tor interface, suitable for 
powering tape recorders or 
other small appliances. 

Figure 3c: Small load 
(<=30 mA) direct inter- 
face. 



45 



Interface an ASCII Keyboard 
to a 60 mA TTY Loop 



Jay A Cotton 
Bidg 844, Apt 2H 
Gov Island NY 10004 



I recently purchased a Sanders 720 elec- 
tronic keyboard. This keyboard is identical 
to the Model 722-1 keyboard which was 
described in BYTE, September 1975, page 
62, except for the key layout and the line 
feed code. My version of the keyboard had 
no line feed, but had a vertical tab key 
which produced an octal 013 code. In order 
to convert this to an octal 012 line feed 
code, some form of transformation logic was 
required. I also wanted to drive my Tele- 
type's 60 mA current loop directly from the 
keyboard. By combining the special case 
code conversion, a UART for parallel to 
serial conversion, a clock and a current loop 
driver, I achieved the desired function of 
sending characters to my Teletype. Figure 1 
shows the schematic of this conversion. 



The Circuit 

I chose to detect the octal code 01 3, then 
to use this special case to alter the data on 
the low order bit of the parallel code pre- 
sented to the UART. By changing the low 
order bit of the octal 013 code from a 
logical one to a logical zero, the number is 
converted from 01 3 to 01 2. The 01 3 code is 
detected using inverters and the 7430 NAND 
gate shown in figure 1. The low order bit is 
selectively changed for this one code by 
using the exclusive OR function of one sec- 
tion of the 7486 integrated circuit. When the 
input at pin 2 is low (the normal case with- 
out the 013 code input), the exclusive OR 
normally passes line 0's value directly to the 
UART pin 26 input; when the input at pin 2 
of the exclusive OR is high (as is the case 



Figure 1: Using a UART 
and special case logic to 
convert and serialize the 
output of a keyboard for a 
60 mA current loop. 




46 



when 013 is detected), the exclusive OR 
function inverts the value of line 0, thus 
transforming 013 at the keyboard into 012 
at the UART. 

The UART is programmed to generate 
the standard Teletype compatible format of 
a start bit, seven ASCII data bits, least sig- 
nificant first, then parity and stop bits. The 
key pressed signal from the keyboard unit is 
used as the data strobe to start transmission, 
and the transmitter end of character output 
of the UART is used to acknowledge com- 
pletion of transmission. A 555 circuit is used 
to generate the clock. The clock should be 
adjusted to a 1760 Hz square wave; the cir- 
cuit shown has about a 15% adjustment 
range for this purpose. The output of the 
UART is buffered by two inversions which 
protect the UART from excessive current 
drain. The buffered output in turn drives a 
relay through the quasi-Darlington coupled 
transistors. The relay used must be capable 
of switching the 60 mA current loop in 
times on the order of one millisecond. It 
must also be capable of sustained operation 
at high rates of change. If your junk box is 
not equipped with such a relay, other alter- 
natives include use of an opto isolator and 
use of a high power interface circuit such as 
the 75451 driver chip." 



Hard Copy for only $249.50! 




The ADAPT-A-TYPER fits over any standard electric 
typewriter keyboard (with electric carrage return), converting 
your typewriter to a hard copy output device. The input can 
be from any TTL level, parallel ASCII source. Requires no 
modification to typewriter. The speed is 'trimmed' to 
maximum speed of typewriter, typically 100 words per 
minute. ADAPT-A-TYPER types any ASCII character found 
on your typewriter keyboard, both upper and lower case. 
The optional SPECIAL FUNCTION plug-in lets you choose 
any typewriter characters to serve as ASCII special functions 

Hi I . >. <C etc ' and automatically identifies them as 'special 
functions'. 

The optional PROGRAMMABLE CARRAGE RETURN 
plug-in allows you to select the number of characters printed 
per line — automatically returns carrage. 

Kit Wired 

ADAPT-A-TYPER $249.50 $399.50 

SPECIAL FUNCTION 21.95 31.95 

PROG. CARR. RETURN 29.50 41.50 

"Delete if plug-in is ordered with ADAPT-A-TYPER 
Texas residents please add 5% sales tax. 

Send check or money order with order. COD's, Mastercharge 
and BankAmericard orders welcome. Write for descriptive 
literature. 



Shipping 
S8.00 
2.00* 
2.00* 



l&y 



H 2 DIGITAL PO Box 6232 Fort Wortri.TX 76II5- (817)336-1353 




UNBELIEVABLE!!!!! 

The intecolor® 8001 Kit 

A Complete 8 COLOR intelligent 
CRT Terminal Kit 

$1,395 



"Complete" Means 

• 8080 CPU • 25 Line x 80 Character/Line • 4Kx8 RAM /PROM Software 

• Sockets for UV Erasable PROM • 19" Shadow Mask Color CR Tube 

• RS232 I/O • Sockets for 64 Special Graphics • Selectable Baud Rates to 
9600 Baud • Single Package • 8 Color Monitor • ASCII Set 

• Keyboard • Bell • Manual 

And you also get the Intecolor" 8001 9 Sector Convergence System for 
ease of set up (3-5 minutes) and stability. 
Additional Options Available: 

• Roll • Additional RAM to 32K • 48 Line x 80 Characters/Line • Light Pen 

• Limited Graphics Mode • Background Color • Special Graphics Characters 

• Games 

ISC WILL MAKE A BELIEVER OUT OF YOU. 



£ Send me_ 



(no.) Intecolor* 8001 kits at $1,395 plus $15.00 ship- 



ping charges each. 

Enclosed is my □ cashier's check, □ money order, D personal check* 

□ $350 deposit/kit for COD. shipment for $ 

NAME 

ADDRESS 

CITY 



. STATE- 



_ZIP_ 




•Allow 8 weeks clearance on personal checks. 
Delivery 30-60 days ARO 



intolllnont Cuctomc rnm 4376 Ridge Gate Drive, Duluth, Georgia 301 36 
mieiiiyciu 3YiiciiibLUip. f Telenhnne (404) 449-5961 



Telephone (404) 449-5961 



47 



Watch lour 

With Help, Of Course, From 
Line of Compatible Plug-in 

All our products are compatible with the 8800 — they 

just plug in to become an integral part of your system. 

Each card can be used in the widest range of 

applications, giving maximum versatility to your Altair. 

Our "no compromise" philosophy assures you the 

highest possible quality. We use a conservative thermal 

design to provide for long life and reliable operation. 

We've also put hysteresis bus receivers on noise prone 

high-speed inputs, giving you maximum noise immunity. 

And, finally, we cover it with a full six- month warranty. 



Video Display Module 

Your Altair already has the intelligence, so 
let us provide the display module. This is not a 
limited "TV Typewriter", but an ultra-high speed 
computer terminal built into your computer. The 
VDM-1 generates sixteen 64-character lines from 
data stored in the IK Byte on-card memory. Alpha- 
numeric data is shown in a 7 x 9 dot matrix with 
a full 128 upper and lower case ASCII character 
set. The VDM-1 features EI A Video output for any 
standard video monitor. (Your TV set can be 
easily modified at your local television repair 
shop.) Multiple programmable cursors, automatic 
text scrolling and powerful text editing software 
are included free. Kit Price, $160. 

A Versatile I/O Card 

Just one 3P+S card will fulfill the Input/ 
Output needs of most 8800 users. There are two 
8-bit parallel input and output ports with full 
handshaking logic. There is also a serial I/O using 
a UART with both teletype current loop and EIA 
RS-232 standard interfaces provided. The serial 
data rate can be set under software control 
between 35 and 9600 Baud. You can use your 
models 15, 28 or 33 TTY! This module gives you all 
the electronics you need to interface most 
peripheral devices with the 8800. And, should you 
decide to buy a 3P+S, we'll be happy to advise 
you on the best way to implement your system 
with our module. Kit Price, $125. 



FOCAL! 

Get a full 8080 implemen- 
tation of 8K FOCAL* (including 
the game of Lunar Lander). It's 
now at your local Processor 
Technology dealer. Object tape 
is available for the copying 
charge only; complementary 
source listing available with 
minimum purchase. 
(*® Digital Equipment Corp.) 

An EPROM Module 

Read Only Memories do 
not lose their stored data when 
power is removed. Thus, they 
have an advantage when used 
in stored program applications. 
Some ROM's, called EPROM's, 
are both erasable and repro- 
grammable. Our 2KRO module 
will accept up to eight EPROM's, 
providing the user with up to 
2048 eight bit words of non- 
volatile storage for monitor, 
executive, loader, and other 
programs. (We recommend the 
use of 1702AandMM5203 
EPROM types. They are not 
included, but are readily avail- 
able for reasonable prices on the 
industrial and surplus markets.) 
Kit Price, $50. 



AltairGrow! 

Processor Technology's Groining 
Hardware and Software. 



Low Power, Plus! 

The 4KRA is a 4096 
word read/write static 
memory module. It provides 
faster, less expensive, lower 
power, and more reliable 
operation than any compa- 
rable memory module sold 
today. The static memories 
don't need refreshing, so 
the result is faster speed in 
actual operation. Lower 
power does not mean 
decreased reliability. All 
RAM's used in the 4KRA are 
91L02A's by Advanced 
Micro Devices. These RAM's 
typically require one-third 
the power of standard 2102 
or 8101 types, and, even 
under worst case conditions, 
draw only 30 % more than 
any currently available 
dynamic memory. Each 
RAM is manufactured to 
military specification. Since 
our module draws so little 
standby current, memory can 
be maintained using a 
battery back-up, in case of 
power failure, allowing long 
term retention of data. Kit 
Price, $139. 

Software 

Our Assembly Lan- 
guage Listing (Package # 1) 
is $3, and includes the 
source listing with hexideci- 
mal object code. Each com- 
mand is described and six 
pages of sample use are 
included. Paper tapes of this 
system are available from 
many Computer Clubs 
throughout the country. 



Turn~On~The~Switch Power 

With our ALS-8, the full power of your computer is available at 
the instant you turn the switch. It provides 6K of PROM's, pre- 
programmed with an expanded version of our Software Package #1, 
including advanced file management capabilities. Files can be 
appended together, re-numbered, moved, or taken apart ... all the 
features you'd expect from a company willing to practically give away 
Software -1. We include a manual which explains the use of the 
program (with examples), each routine of the system, and how to call 
these routines from other programs you've written. You won't be locked 
into a ROM version you'll be able to customize your ALS-8 to your 
individual needs. The ALS-8 Firmware includes a module with all 
components capable of holding 8K of "turn-on-the-switch" program, so 
it will be upward compatible with future software developments. And, 
two of these are up and running now. Kit Price, $250. 

An Interpretive Simulator... 

Our SIM-1 Expansion Firmware runs 8080 programs, in an 
interpretive mode, on the same 8080 that contains the Simulator. This 
isn't just a de-bug program, because the program actually "thinks" it's 
an 8080! A complete brochure explaining all its capabilities is available 
from Processor Technology. Price, $95. 

And, A Text Editor! 

Every ALS-8 includes the edit command. This command, 
combined with our Expansion Firmware #2 (Text Editor) and the VDM, 
adds the world of text editing to your system. Single characters, entire 
lines, portions of lines can be inserted, deleted, moved and, ultimately, 
printed out. The addition of Firmware -2 to your ALS-8 will give you 
text editing capability equivalent to systems selling for $30,000 just a 
few short years ago. It's been running at Processor Technology since 
January, and it's ready for shipment now. Price, $95. 

Write us for complete specifications on these and other 
compatible plug-in products: Our single-piece Mother Boards will give 
you 16-card capacity in one installation. A Wire Wrap Board, to help 
you do your own wire wrap prototyping, creating custom interfaces. 
An Extender Board, which allows accessibility in servicing any 8800 
compatible module. 

All items postpaid if full payment accompanies order. COD 
orders must include 25% deposit. Master Charge (minimum $25) 
accepted, but please send an order with your signature on it. Discounts 
on orders over $375. 





Technology 



6200-B Hollis Street 
Emeryville, CA 94608 



Frankenstein Emulation 



Joe Murray 

International Harvester, Solar Division 

2200 Pacific Hwy 

San Diego CA 92138 



This is a let's get the ball rolling article. 
We now can analyze and build working 
models of at least portions of the human 
brain right in the home. Paper and pencil 
models of the brain develop naturally and 
almost without effort when we use real time 
digital design methods. The hardware and 
software mechanizations fall out naturally; 
then we just use the home computer lab to 
build what we have designed. 

The Model 

Let's follow the development of a crude 
and simple system engineer's model of the 
human "computing system." We look in- 
wards, down into ourselves, and what is the 
first thing we sec? 

The Top Processor 

This is the only unit that is really visible 
to the user. The Top CPU functions at the 
heart of the human control console. Here, 
our personality can sit down and use the 
entire human system to the limit of its 
capabilities. This visibility of only the input, 
output and manual control functions is 
typical of all computer systems from the 
hand calculator to the human brain; the rest 
of the system is invisible to the user and can 
only be deduced from what we see in the 
way of output response to input stimuli. 

The Top Processor's Executive Program 

Our personality uses the Top Processor as 

the system executive. The Top Processor is 

boss. Messages from the Top Processor set 

priorities for all the other elements in the 

human system. Exceptions to this rule are: 

1. Emergency interrupts — a large set of 

emergency situations are fielded by 

faster, more powerful processors in 

subsystems. 



2. Standard functions — built in exe- 
cutive programs in other processors 
manage tasks like circulation, diges- 
tion, etc., without bothering the Top 
Processor. 

Top Processor Memory Allocations 

The Top Processor has access to a limited 
scratch pad memory. However, this limited 
memory is used in an efficient mannner. The 
intersystem communication control pro- 
grams can learn to transfer whole programs 
or portions of programs from the main 
memory banks to the Top Processor scratch 
pad memory. In a similar fashion small data 
sets can also be transferred. This is the 
familiar overlay manipulation (used in man 
made machines) that allows solution of 
complex problems in limited working 
memory by transfer to and from bulk 
storage units (as in magnetic disks and 
tapes). 

The Top Processor's Use of Overlay 

If the entire program and necessary data 
can all be stored in the scratch pad of the 
Top Processor, it simply executes the pro- 
gram on the data set and outputs the answer 
(example: 2+3 = 5). However, when the 
program and data set arc too large to be 
loaded into the scratch pad memory, the 
program and data set are broken into se- 
quential, related segments. The program is 
worked in segments and intermediate an- 
swers are stored. Final answers are output to 
our personality upon completion. Training 
can increase the power of this method; 
however, each of us has our own personal 
limit: For instance, I either lose some data 
or else lose my location in the program 
sequence. During the past few thousand 
years we humans have developed a host of 



50 




languages for communication. We also use 
these communication tools to extend the 
overlay method to more complex problems. 
We write down intermediate answers and 
manually track the execution of the program 
sequence. These languages include English, 
Polish, Spanish, arithmetic, algebra, Boolean 
logic, numbering systems, FORTRAN, PL/M 
(to name a few). The only limits on this 
extension of using the Top Processor in 
overlay fashion are: 

1. Can we find the required data set? 

2. Can we formulate the problem so as to 
allow a solution? 

3. Do we have enough time? 

This overlay use has become so powerful 
(with the help of the various languages) that 
we sometimes neglect a more ancient, nat- 
ural, rapid and sometimes more powerful 
method to arrive at a solution. This method 
is to: 

1. Develop the framework of the prob- 
lem in the Top Processor. 

2. Digest the available data within the 
framework of the problem. 

3. Assign a high priority to the problem. 

4. Send the above three items to faster, 
more powerful CPUs. 

5. Sit back with a cup of coffee and wait 
for an answer. 

When I follow this latter procedure, the 
return message is either: 

1. The answer I seek. 

2. The identification of missing data. 

3. A question mark. 

4. Garbage: (Garbage In implies Garbage 
Out — often abbreviated GIGO) 

For answer 2, I go search for the missing 
data. For answer 3, I both search for missing 
data and review the framework of the 
problem for possible faults. For answer 4, I 
may use the garbage; I have carried some 
misconceptions for years. 



Start the System Diagram 

Let us summarize the Top Processor and 
place it in the system diagram. We've 
deduced by introspection that the Top 
Processor: 

1.1s boss — The Top Processor is in 
direct communication with our per- 
sonality and (with some exceptions) 
sets the priorities for the whole mul- 
tiple processor system. 

2. Has access to a small scratch pad 
memory. 

3. Can fetch programs and data from the 
main memory bank. 

4. Receives some body sensor data. 

5. Communicates directly with other 
CPUs. 

Figure I shows a pictorial summary of the 
system. 

Data Bus Structure 

The data bus structure is depicted in 
figure I, using the normal multipath digital 
type of bus. However, empirical evidence 
implies a more complex communication 
system between elements of the human 
system. Just as the entire human system 

TO AND FROM OUR 
PERSONALITY 
(INPUT AND OUTPUT) 



SCRATCH 
PAD 



<= 



=> 



TOP 
PROCESSOR 



<= 



NOTE- 
DATA BUS STRUCTURES ARE 
SHOWN BY THIS FORM \ 



<= 



>TO AND FROM 
SENSOR PROCESSOR 



TO AND FROM 
MAIN PROCESSOR 



Figure I: The Top Processor. Introspection starts at the immediately available 
evidence: We all have a Top Processor, our personality which controls most of 
our actions. 



51 




adapts to the use to which our personality 
puts it, this bus structure also adapts to how 
it is used. Witness the ease of recall on an 
often used phone number versus the dif- 
ficulty in recall of a seldom used number. 
We might guess that somehow the bus 
structure is under adaptive software control. 

The Main Processor 

We now arrive at the general purpose 
powerhouse of the computing system. The 
Main Processor handles awe inspiring prob- 
lems with unbelievable speed. We must 
postulate: 

1. Elegantly simple programming. 

2. Operation at a fast effective clock rate. 

3. An outstandingly efficient internal 
executive program. 

4. Access to the bulk of stored programs 
and data. 

5. A complex priority interrupt system. 

6. A multiple bus structure to the rest of 
the human system. 

Main Processor Speed of Execution 

The Main Processor is a very fast machine 
operating on elegant and simple program- 
ming. For instance, some of the muscle 
control programs must take only 20 to 50 
milliseconds for completion of: 

1. Input of data. 

2. Compulation on new data. 

3. Output of control commands. 

4. Cleanup for next computation period. 
Navigation and guidance computation 

periods can be longer. However, they can 
not be much longer when we watch a small 
boy pick up a rock and knock a can off a 
fence post, all in the space of two to three 
seconds. Another awe inspiring feat is the 
performance of a businessman in his value 
judgment search as he keeps abreast of the 
rapid fire conflicts in the executive board- 
room. The Main Processor seems to be an 
order of magnitude faster than the Top 
Processor (witness the increase in touch 
typing speed when the Top Processor gets 
out of the act). 



The Main Processor's Executive Program 

The executive program provides for 
scheduling Main Processor tasks that: 

1. Field emergency interrupts such as 
avoidance of a fast moving object 
detected on visual sensors. 

2. Take calls from the priority stack such 
as recognizing hunger and thirst. 

3. Time share muscle control and evalua- 
tion of sensor data when both arc 
active as in soccer game. 

4. Regularly service body functions such 



as circulation, digestion, elimination, 

etc. 
5. Start and stop background tasks such 

as meditation. 
The quantity and variety of data used by 
the Main Processor in combination with the 
rapid response in answer to massive and 
conceptually difficult problems implies a 
very efficient software organization. The 
Main Processor must access tables that 
define the location of: 

1. Stored life history data. 

2. Muscle control programs. 

3. Chemical control programs. 

4. Temperature control programs. 

5. Guidance programs. 

6. Navigation programs. 

7. Value judgment data. 

8. System priority data. 

9. System timing data. 
10. Unused memory. 

The Main Processor Decision Process 

One of the most interesting functions of 
the Main Processor is to aid in the decision 
process we use when faced with alternate 
courses of action in response to events in the 
world around us. The evidence implies that 
the Main Processor takes formulation of the 
decision problem and the pertinent data 
from the Top Processor and Sensor Pro- 
cessors. These inputs are then heuristically 
compared to an immense value judgment 
table to generate a candidate decision. The 
candidate decision is sent to the Top Pro- 
cessor for further evaluation. 

The Value Judgement Table 

This table has a strong effect on the 
pathway we follow in life, from when we 
make the decision to start breathing until we 
are forced to stop breathing. How do entries 
appear in this table? Some entries must 
appear while we are within our mother. A 
new born infant makes the decision to start 
breathing or has an early death. Some entries 
come from trial and error experience. The 
young infant soon learns to cry just so 
mother will pick him up. 

Some entries come from other people. 
The young child seeks his parents' approval, 
not their punishment. Another question: 
What can we know about entries in this 
table? We seem to know only recent, tempo- 
rary residents such as priority on getting to 
the grocery store. The older, more perma- 
nent residents that have a continuing effect 
on our lives were either never known or long 
ago forgotten; yet there they sit, having a 
permanent effect on our success or failure in 
every endeavor (scares you, doesn't it?). 
Utility programs for determining the content 



52 



of this table and altering it can be imple- 
mented. This is sometimes accomplished 
through a verbal data link to an external 
Diagnostic Processor. 

The Interrupt System 

These interrupts are fielded in the Main 
Processor, and arc used to re-direct effort, 
from meditation and decision processes to 
avoidance of a thrown rock or jumping away 
from a hot stove. The priority interrupt 
steers to the proper program without hesita- 
tion. Priority of the interrupts is used to 
decide which of several should be serviced. 

The Main Processor Bus Structure 

The Main Processor has a multitude of 
output and input data. Even in this crude, 
simple model, the resulting bus structure is 
quite complex. Let us add the Main Proces- 
sor and connecting bus structure to produce 
the system diagram of figure 2. 

The Sensor Processors 

The Sensor Processors arc fast, special 
purpose units. Data is acquired from the 
eyes, cars, and a host of body sensors that 
continually look inside and outside the 
human system. The Sensor Processors for 
these devices execute programs that organ- 
ize, compact and format this huge data 
flow for rapid and effective use by both the 
Top Processor and Main Processor. The 
introspective evidence implies: 

1. A very fast clock rate. 

2. Elegant and simple programs. 

3. Access to a dedicated memory. 

4. Existence of a buffer scratch pad 
memory for temporary storage of out- 
put data. 

5. A very efficient executive program. 

6. A complex input bus structure. 

Intuitively one feels that sensor pro- 
cessing is not done by a single unit. Rather, 
an organization with a master processor and 
several dedicated slave processors would 
better fit the performance requirements. 
Each slave Sensor Processor could provide 
parallel service to the eyes, ears, etc. Figure 
3 shows an addition to our system diagram 
to account for the master Sensor Processor 
and its slaves. 

The Creative Process 

All ol us are creative; this is the way our 
personal human system adapts to the 
changing world around us. We create new 
machines, art objects, programs within our 
brain, communication languages, etc. The 
list is endless. Just how do we implement the 
creative process? 



TO AND FROM OUR 
PERSONALITY 
(INPUT AND OUTPUT) 



SCRATCH 
PAD 



o 



o 



i 



TOP 
PROCESSOR 



TABLES 



O 



PROGRAMS 



=> 



I 



o 



=o 



MAIN 
PROCESSOR 



n 



■« — 



=> 



TO AND FROM 
SENSOR PROCESSORS 



TO AND FROM 
SENSOR PROCESSORS 



FROM PRIORITY 
INTERRUPT SYSTEM 



TO AND FROM REST 
OF HUMAN SYSTEM 



Figure 2: The Main Processor. Digging a bit deeper, we find that there is a 
lower level Main Processor which works cooperatively with the Top Processor 
to do a lot of the detail work in the system. 



TO AND FROM OUR 
PERSONALITY 
(INPUT AND OUTPUT) 



TO AND FROM SENSORS WITH 
SLAVE SENSOR PROCESSORS 
(EYES, EARS, ETC) 



MEMORY 



SCRATCH 
PAD 



c=> 



i 



TOP 
PROCESSOR 



i 



MEMORY 



MASTER 
SENSOR 
PROCESSOR 



TABLES 



LIFE HISTORY 



PROGRAMS 



u 



MAIN 
PROCESSOR 



V- 



INTERRUPT 



=> 



CLOCK 



EXEC. 



PROGRAMS 



SCRATCH 

PAD 

BUFFER 



TO AND FROM HUMAN 

CONTROL SYSTEMS 

(MUSCLE, CHEMICAL, TEMP, ETC.) 



Figure 3: Adding the Sensor Processors to the System Concept. A system of 
Sensor Processors can be identified; they probably consist of a Master Sensor 
Processor with multiple Slave Sensor Processors dedicated to actual devices. 

Let us postulate Random Pattern Gener- 
ators for various creative tasks. The Sensor 
Processors can drive these generators with a 
supply of random combinations of data. 

The Creativity Processor 

The Creativity Processor uses the output 
of the Random Pattern Generators to build 
new logical structures or modify existing 
logical structures. These new structures are 
tested against requirements generated by the 
Top Processor. The value judgement process 
makes decisions that guide the Creativity 
Processor in continued improvement of the 
new design (in iterative, random fashion) 
until acceptance is obtained. The speed of 



53 



TO AND FROM 
ALL PROCESSORS 



EXEC. 



DATA ON 

EXISTING 

DESIGNS 



PROGRAMS 



<= 



=0 



Figure 4: Adding the Cre- 
ativity Processor to the 
System Concept. We must 
not forget about creativ- 
ity. Interacting with the 
whole system is a matrix 
of creativity symbolized 
by the concept of Creativ- 
ity Processor with its ran- 
dom pattern generation 
features. 



i 



CREATIVITY 
PROCESSOR 



<P 



=> 



RANDOM 
PATTERN 
GENERATORS 



I 



TO AND FROM 

SENSOR 

PROCESSORS 



the creative process has a heuristic design 
which improves with experience. 

The Creativity Processor and intercon- 
necting bus structure are shown in figure 4. 

Data Set Manipulation 

The data sets which are transferred 
throughout the system seem to be organized 
along the lines of various patterns (one 
picture is worth a thousand words). For 
instance, when we recognize someone, we 
seem to be recognizing some main features, 
not every detail that is available through 
close inspection. Visual data sets from the 
Sensor Processors seem to have been pro- 
cessed into some skeleton pattern before 
transmission to the other processors. Data 
from the ears seems to be stored in some 
logical thought structure pattern. I think out 
ideas both in picture and word format. 



Then, if my thinking was in picture format, I 
have trouble expressing my ideas verbally; 
whereas, if thought out in words before- 
hand, the expression of the ideas flows 
logically and clearly. 

As in any control and guidance system, 
numerous feedback paths also exist. These 
were not detailed in this simple model. 

Test the Model Validity 

With a computer in the home laboratory, 
we have the means to test models of the 
human brain like this sketch. We can start 
with simple approximations and work our 
way up. Then, when our home brew com- 
puter system begins to perform like some 
portion of the human computing system, we 
have more than speculative evidence; we 
have truly come to know how that portion 
of the brain works. Also, some very useful 
hardware and software configurations may 
come out of the search. 

Looking inward from the control console, 
we have followed the generation of a specu- 
lative, crude, simple, system engineer's 
model of the human computing system. 
Construction follows the line of man made, 
real time digital systems. In fact, one often 
suspects that designers of real time operating 
systems use very introspective models. This 
should make us optimistic that digital design 
tools are a natural and powerful approach to 
analysis of the human reasoning powers and 
control systems." 



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SPECIFIC A TIONS: 

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B. Two channels (I) Clock, (2) Data. Or, two data channels 
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D. Outputs: Two (2). Board changeable from TTY, RS232 
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new data on one track and preserve three or record on 
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54 



Technology Update 




BYTE always searches far and wide for 
the latest in the technology of computing 
systems. This month in the hills of New 
Hampshire, we discovered an example of 
computer technology in the form of the first 
practical Touring Machine, shown here 
complete with a unary relocatable based 
operator (in IBM OS PL/1 parlance). 

For those individuals having less than a 
passing acquaintance with computer science, 
the Turing Machine is a famous mathemati- 
cal construction first formulated some 
decades ago by Alan Mathison Turing, and 
which can be shown to be logically 
equivalent to any digital computer imple- 
mentation. A Turing Machine is to comput- 
ing what a Carnot Cycle is to thermodyna- 
mics. (The fact that this particular Touring 
Machine implementation looks like a CarNot 
Cycle is purely incidental.) But Turing 
machines have been notoriously impractical 
in terms of everyday computer usage until 
this new product rolled into town. 

This newly released virtual Touring 
Machine, version 27 chain level 1, incorpo- 
rates numerous state of the art features 



which make it one of the better examples of 

the form. These features include: 

1 . SH I FT (micro instruction). 

2. 1 speed clock controls. 

3. 2 phase clock drive. 

4. clock conditioner. 

5. LCS (large cookie store). 

6. global debugging mechanism. 

7. flying head with head crash padding. 

8. access arm. 

9. audio output peripheral. 

10. visual input scanner. 

11. audio input scanner. 

12. local deby king mechanism. 

1 3. relocatable memory mapping software. 

14. HLT (halt instruction). 

15. system maintenance package. 

1 6. competing access lockout feature. 

17. nomadic road interfaces. 

1 8. tape. 

19. SHIFT (macro instruction). 

20. EXCP (executing channel program). 

21. sectored disk drive. 

22. transmission links. 

23. unallocated stowage. 

24. machine environment (circa January 

30 1976). 



55 



Design an On Line 



Robert R Wier 

PO Box 9209 

College Station TX 77840 

James Brown 

2518 Finley St No 636 

Irving TX 75062 



Machine or assembly language will most 
likely be used by many computer experi- 
menters. While many professional program- 
mers will swear by the use of assembly 
language, others, perhaps equal in number, 
will swear at it, preferring the use of high 
level languages. To those new to the field, 
these terms may seem confusing. It's really 
quite straightforward when one remembers 
that the language a machine uses differs 
considerably from the one used by the 
people. As one surveys a continuum from 
machine to human languages, the language 
most easily understood by the machine is a 
binary language; next on the continuum is 
assembly language with additional features 
that make it considerably easier to use, thus 
avoiding all night debug sessions, frazzled 
nerves, and 2 AM programming logic which 
hardly ever works, etc. For a good discussion 
on assemblers, see the October 1975 issue of 
BYTE. Easier yet for the programmer are 
languages such as BASIC, FORTRAN, PL/I, 
and ALGOL. These languages allow the 
problem to be stated and solved in terms 
better adapted to human understanding. 
Unfortunately, there are rather serious diffi- 
culties encountered when these high level 
languages are to be used on small systems. 
They require a compiler or interpreter to 
transform the problem from the high level 
language to machine language and more 
memory than is found in most small hobby 
systems. Therefore you'll probably be using 
assembly and machine language. After the 
program is written and loaded into the 
machine, experience has shown an astro- 
nomical probability against the program 
working correctly if it is more than two 
instructions large. Considerable time will 
probably be spent at the front control panel 
surveying the address and data lights, 
mumbling "I dontunncrstand" and 



56 



"(expletive deleted) machine!". This can 
lead to terrific pains in the back and neck 
from bending over to look at the panel 
square in the face and operate the switches. 
This is commonly named "minicomputer 
neck." 

How much nicer would it be to sit in a 
chair and do approximately the same thing 
using a Teletype or CRT display (CRT is an 
abbreviation for Cathode Ray Tube, essen- 
tially a TV picture tube. A television type- 
writer is a unit often used in this 
application). 

There arc several ways to use the control 
panel: 

I: Executing a few instructions, then 
examining memory to see what the 
blinking machine is really doing, or 

2: Inserting or changing data in memory, 
or 

3: Displaying the contents of specific 
memory locations, or 

4: Searching through memory for a 
specific bit string or number, if you 
prefer, or 

5: Displaying and possibly changing the 
values in the CPU registers. 

The authors had occasion to be working 
with a 16 bit/word minicomputer which 
mainly was used as a remote job entry 
terminal into a large computer. It could, 
however, function as a stand alone computer. 
Since an assembler was available, a number 
of assembly programs were written and 
debugged. When the machine was first de- 
livered, a temporary control panel was pro- 
vided. Since this was to be removed at some 
future date, the following technique was 
used to implement a DEBUG program using 
a CRT terminal to replace the control panel. 

The basic idea is to develop a program 
that will take care of the functions outlined 
above and interface to the console terminal 



Debugger 



TERMINAL 



DATA 8 
COMMANDS' 





DEBUGGER 


= ROGRAM 




PROBLEM 

PROGRAM'S 

REGISTERS 








PROBLEM 
PROGRAM 
TO BE 
DEBUGGED 










INTERRUPT 
HANDLERS 

















Figure I: Logical arrangement of debugger. 



and hopefully will protect itself from wild 
extremes of a program being debugged. This 
might be thought of as running a program 
within a program (figure 1). Hereafter, the 
program being debugged will be referred to 
as the problem program. 

The debugger program must have pro- 
visions for a number of things. It has to 
handle the IO for the hardware and to 
converse with the human programmer. It has 
to keep track of the various status condi- 
tions of the program being debugged (the 
problem program). It must understand the 
input commands directing it to perform 
certain actions of the problem program. It 
must be transparent to the problem program 
so that when the final version is finished, the 
problem program may be loaded without the 
debugger, and still work. 

In addition, the debugger should be small 
in size, and easy to implement to avoid the 
herculean task of debugging the debugger. 
(Although that's not strictly true. Once the 
IO and display portions were working, we 
used these to debug the rest of our de- 
bugger.) 

The following commands arc the results 
of our efforts to provide effective yet 
concise operations. In this list adr means a 
specific memory address, val a value, and reg 
a register. 

The final implementation including all 
the IO and interrupt handlers required 560 
bytes, or about 256 instructions on the 
Lockheed SUE I II minicomputer. Figure 
2 is an overview of the debugger logic flow. 
It is reasonably straightforward, except for 
the execute (G) instruction. Consider the 
debugger waiting for a programmer to enter 
a command. It just sits there wasting expen- 
sive electricity. As soon as you enter a 
command, the debugger checks it for vali- 

text continued on page 60 



Table I: DEBUGGER program commands. 
Each command consists of an operation 
code character, followed by from one to 
three operands (numbers) separated by 
blanks. The command line is completed by a 
period. In implementing the program, the 
computer should respond with a carriage 
return and line feed after finding the period. 

Cadrval. changes memory at adr 

to val 

Cadrl adr2 val. changes memory from 
adrl through adr2 to 
val 

D adr. displays memory con- 

tents at adr 

D adrl adr2. displays memory con- 

tents from adrl through 
adr2 

D adrl adr2 val. searches memory from 
adrl through adr2 for 
val 

R. displays the contents of 

all registers 

R reg. displays the contents of 

register reg 

R reg val. changes the contents of 

register reg to val 

@ adr. sets return to debugger 

at adr in problem 
program 

G. go, i.e., continue or 

start execution of 
problem program using 
contents of the prob- 
lem program's program 
counter register 

G adr. start execution of prob- 

lem program at adr 



57 



Figure 2: Debugger flowchart. 



CPU REGISTERS 
SET BY PSEUDO 
REGISTERS 



<^M-0 ^ 


NO 


SET UP 
JUMP TO 
"ddr." 










SET UP 
RETURN TO 
PROBLEM 
PROGRAM 


rrT" 1 

-i: g :j 












Q 







-A "G odr." I 
I 



(JUMP TO PROBLEM \ 
PROGRAM J 



ENTER 
I DEBUGGER I 

I _,___! 

I 

( BEGIN J 



ITeave 
i debugger, 

I ENTER 

PROBLEM I 
I PROGRAM | 
I I 



INITIALIZE 
SYSTEM AS 
REQUIRED 



I 1 

1 SEE NOTE I 

I I 



r 1 

3\ 1 "(a) odr." I 

L_l I 



\REAO 8 PARSE 
\ COMMAND 
\ (SETS M) , 



I r 1 

•-| SEE NOTE 2 



SET TRAP 
AT "odr" 



I 1 

1 SEE NOTE 4 | 

I 1 



1 SEE NOTE 3 ' 

I 



U 




I 1 

H"G"COMMAND ROUTINE 
L 



J 



3 V-)"@"COMMAND ROUTINE 



^ 



J 



INE 



-|"R"COMMAND ROUTINE 
I I 



H"C" COMMAND ROUTINE 
I I 



H"D"COMMAND ROUTINE 



n 



, DISPLAY 
\ ERROR 
\MES- 
\SAGE / 



-HBAD OPERATION CODE 



J 




YES 



I I 



DISPLAY 
ALL 
REGISTERS 



-o 



I 1 

I "R reg." |— | 
I 1 I 




_L 



YES 



DISPLAY 

REGISTER 

■res" 



<D 



REGISTER "reg' 

: ■ val 



I " R reg val. M 

H J 

1 



DISPLAY 

REGISTER 

"reg " 



A TRAP EXAMPLE 


Assume that the memory of the com- 
puter contains the following information. 


Address 


Content at this address 


LOW 


Beginning of the problem program 
region, a low address. 


LOC.W 
LOC.W+D 


Call DEBUGGER trap handler. This 
is a "trap." 

Assuming a trap call of length D, 
this is the next instruction of the 
problem program after the trap. 


LOC.X 
LOC.X+1 


Problem program ends. 

Systems programming area begins 

(RAM, not ROM). 


LOC.Y 


DEBUGGER program starts. 


LOC.Z 


DEBUGGER'S trap handler routine. 


HIGH 


End of systems programming area. 



58 



Note 1: The DEBUGGER program acts as a system 
monitor for your computer. Whenever the com- 
puter is restarted, the DEBUGGER is entered and 
will execute a power-on initialization sequence. 

Note 2: The format of the command line and a list 
of all the variations on each command are found in 
table 1. The input routine should parse the 
command line by identifying the operation code 
and operands, stripping blanks, and counting the 
number of operands (M). 

Note 3: The function LOOKUP is used to translate 
an input ASCII command character into a cor- 
responding integer number. In the authors' system, 
this was accomplished by manipulating the bits of 
the ASCII character code; other schemes are 
possible. 

Note 4: A trap is set by replacing the instruction at 
the trap address with a temporary alternate which 
causes a branch to the trap routine. The instruction 
used for this purpose in the authors' system was a 
"jump to subroutine." Depending upon the par- 
ticular computer architecture, other instructions 
might be used, such as software interrupt, super- 
visor call, etc. 

Note 5: Both trap instructions and interrupts 
require similar processing. One way to view the 
DEBUGGER program is as a large interrupt 
handler which is entered upon system restart, 
execution of a trap, or end of a problem program's 
execution. 

Note 6: Command formats from table 1 are shown 
in quotes within comment boxes in this flow chart. 



Assuming a stack oriented machine in 
which the state information is stored in the 
stack, the following sequence occurs in a 
typical case. 

1. The user enters a program. After 
entering it, he decides to place a trap 
at location LOC.W in memory with 
the "@" command. 

2. The problem program begins execu- 
tion after a "G LOW." command. It 
reaches the trap at LOC.X and 
executes the subroutine call. 

3. The subroutine call saves the address 
of the next instruction (at a minimum) 
and branches to the trap handler at 
LOC.Z. The trap handler continues the 
state saving process so that the 
machine's stack contains complete 
CPU state information. 

4. The trap handler displays a trap mes- 
sage containing information on the 
address and register content of the 
machine at the time of the trap. 

5. The trap handler passes control back 
to the DEBUGGER'S command line 
interpreter. 




r 1 

I " D odr." j 



\ DISPLAY 
M-l >—=^ \M(adr)/ 



-o 



| 1 

| "C adr I adr2 val. " 

I ., I 




G>^< m 




YES 






H.EAVE PROBLEM fl EAVE PROBLEM 

| PROGRAM, ENTER | | PROGRAM, ENTER I 

j INTERRUPT SERVICE | j DEBUGGER | 

I p 1 I . I 



I 



:~l 



I 



(interrupt) -J N ° 5 TE }- (tra C p UTE ^ ) 



SAVE 
CPU 

STATE 



SAVE 

CPU 

STATE 



INTERRUPT 
HANDLER 



DISPLAY TRAP/ 
V MESSAGE / 



(return) 



Tleave interrupt ! 

service, enter 
i problem program i 



59 



text continued from page 57 

dity, and if it is a legitimate command the 
various parameters are read and stored in 
memory to be accessed when necessary. 
Now the debugger looks at the part of the 
command line which tells it what to do 
(known as the opcode). Assuming that you 
are using ASCII, here is a sneaky way of 
determining which routine to go to. 
1 : Add 9 to the ASCII character, 
2: Logically AND the opcode character 

with a 7, 
3: Assuming the given opcodes 
(C,D,R,@,G), you now have a numeri- 
cal index which you may use to test or 
use in a jump table to go to the proper 
code which accomplishes the desired 
function. 
EXAMPLE: Suppose you have an ASCII 'R'; 
in binary this is: 



0101 0010 
0000 1001 



'R' 
add 9 



0101 1011 -AND result 
0000 01 1 I -with 7 

0000 0011 -final result is '3' 



using this method then: G=0, @=1, R=3, 
C=4, D=5. 

Now we offer a few comments on the 
various procedures shown in figure 2. 

Change: This is perhaps the simplest of all 
the commands to implement. Using the last 
parameter supplied, step through memory 
from the first address zapping each location 
with the desired value until the ending 
address is reached (note: for a single address, 
adr1=adr2). Though not necessary, it is 
highly recommended to check the addresses 
for validity to avoid clobbering the de- 
bugger. 

Display: Simply step through memory from 
the starting address to the ending address 
displaying memory contents as you go. We 
displayed in hexadecimal notation. You 
might alternately wish to use octal or (God 
forbid) binary. Since our CRT was capable 
of an 80 character line, we put 8 groups of 4 
hex characters on each line: 

LLLL: XXXXXXXXXXXX XXXX 
XXXX XXXX XXXX XXXX 

The first number is the memory location of 
the lowest address displayed on the line 
(leftmost). Using this, it is easy to glance at 
the display and see patterns in memory. 

For the search option of the display 
operation, you need only to print out the 
addresses where a compare was successful. 



You should be able to remember what you 
are looking for. When the search option is 
used, a flag is set which somewhat modifies 
the display such as: 

: LLLL LLLL LLLL LLLL 
LLLL LLLL LLLL LLLL 

where the L's are the memory addresses 
containing the argument. 

Some commercial variants of the search 
operation allow you to look for certain bit 
patterns within words by masking out don't 
care bits; however, this is no small task to 
program for a feature of somewhat limited 
usefulness. 

Register: Here you have three alternatives 
determined, once again, by the number of 
operands (i.e., how many parameters you 
specify with a particular opcode). No 
operands are used to indicate the display of 
all register contents. If one operand is 
present, then the content of that register 
only is to be displayed. Two operands 
indicate the contents of the specified register 
are to be changed to the given value. 

Please note that these registers are really 
fixed memory locations, set aside inside the 
debugger (i.e., pseudo registers). These 
values are typically loaded into the CPU 
registers by the G command. Most CPUs 
have one or more general registers plus a 
program counter (i.e., the address of the 
next executable instruction), and a collec- 
tion of indicators commonly referred to as 
status flags or sometimes as status registers. 
For our implementation we had seven 
general registers numbered (cleverly) one 
through seven. Register number zero was the 
program counter and register number eight 
was the status register (note: All registers 
were 16 bits large). Thus we only had to 
enter a single digit, zero through eight, to 
reference any register. On most micro or 
minicomputers, alphabetic type designators 
are used to reference registers, but with 
much luck a similar trick used to simplify 
opcode determination may be used. 

GO and SET TRAP: This section is the most 
machine dependent implementation which 
requires very careful planning. The object 
here is to put the problem program into 
execution, and eventually have control re- 
turned gracefully to the debugger. The point 
where execution is to end and control to 
return to the debugger is called a breakpoint 
or trap. 

Constructing a trap is not too difficult. 
The simplest method is to insert in the 
problem program an unconditional branch 
back to the debugger. A serious drawback of 



60 



Figure 3: How to set traps in the problem 
program (see text). 

MEMORY MAP 

Address Contents 

LO Problem program starts 



W Call debugger trap handler at address Z 

W+1 Problem program continues 



to a branch). Typically a branch using the 
contents of the pscudo program counter 
would be used (note: Branches usually do 
not set or reset status flags). 

In conjunction with the preceding, there 
should be a phantom routine which is the 
target for all traps. Its job is to save all 
registers and status before the debugger main 
routine uses them into the pscudo register 
area. It is suggested to display the program 
counter and the fact that a trap occurred, 
such as: 



X Problem program ends 

X+1 Stack starts 



X+n Stack ends 

Y Debugger program starts 



Z Trap handler of debugger program 

HI Debugger program ends 

ALGORITHM 

The stack of n elements is located at address X, the 
debugger program at address Y, and the trap 
handler at Z. The following steps are executed: 
1: The problem program executes a trap at 
location W, i.e., a subroutine call to the trap 
handler. 
2: The subroutine call saves the address W+1. 
return address W+1 in the stack, e.g., in X+3 
3: The trap handler at address Z is executed. 
4: The trap handler fetches the return address 
W+1 from the stack (in this example X+3), 
reduces the stack by one element, and 
displays the address W+1 . 

this is that the location from which the 
branch occurred will be unknown. The 
solution is to use an unconditional sub- 
routine call to the debugger. A call instruc- 
tion places a return address somewhere, 
depending on the machine, and then 
branches to the location specified in the 
instruction. With this it is a simple matter to 
retrieve this return address as the program 
counter for the 'G.' option of the GO 
statement (figure 3). Our computer had 
fixed locations in which routine addresses 
could be placed, such that if certain types of 
interrupts occurred the return address was 
saved and a branch taken using the address 
at that location (vectored interrupts). One 
such interrupt was a "bad" instruction inter- 
rupt, hence the setting of program traps 
consisted of moving an illegal instruction to 
the location a trap was to occur. 

The GO command should set the pseudo 
program counter if an operand is present, 
then load all general registers. The last two 
registers loaded are the status flags and the 
program counter (which would be identical 



@ interrupt address 

There is a dandy reason for this. If multiple 
traps exist, it is handy to know which trap 
was encountered. Additionally, since the 
trap itself may clobber one or more memory 
locations in the problem program, to remove 
a trap one must change these trap instruc- 
tions back to the original contents (typically 
from the original assembly listings). In an 
earlier version of the debugger we allowed 
only one trap per execution and saved the 
good code from the trap location. When the 
trap occurred, we then restored the good 
code at that location. However, a serious 
drawback, of course, was that it isn't always 
known what branches will be taken between 
the G and @ instructions, and it was highly 
probable that the trap would be bypassed 
entirely. Thus in our present debugger we 
allow multiple traps but do not restore the 
previous code when a trap occurs. 

Execute Instruction Considerations: If you 

happen to get lied up in an endless loop, 
you'll have to manually force a return to the 
debugger. This could be accomplished in 
several ways. You could physically reset the 
machine from the control panel (assuming 
you have one), and enter the debugger 
starting address. Or you could have pre- 
viously set up an interrupt structure which 
would respond lo some outside stimulus 
(such as an escape from the keyboard, or a 
special control panel switch) which would 
accomplish a branch lo DEBUG. Some 
thought was given to simply kicking the 
power supply, initiating a power fail inter- 
rupt, but this was later discarded. 

If you make extensive use of interrupts in 
the debugger (which is not really necessary) 
then you'll have to debug your problem 
program's interrupts separately. Otherwise 
the problem program's interrupts and the 
debugger's interrupts will be working at 
cross purposes. 

Should you place the breakpoint address 
in a branch of a conditional statement that 
doesn't happen to be executed, then the 
program will just skip around your brcak- 



61 



point. Or worse, placing the trap instruction 
as the operand of a multiword instruction 
could be distressing. The obvious solution to 
the first problem is the placing of multiple 
traps, so the problem program could not 
escape from the debugger regardless of the 
flow of control. The latter had no fool proof 
solution except exercising a little caution as 
to trap locations. 

Some commercially available debuggers 
are really monitors that check the program 
counter every time a step is executed (inter- 
preters). With a little thought it is apparent 
that this would involve considerably more 
programming than we've discussed here. Our 
debugger just allows you to set up the initial 
conditions and then "let fly," while the 
alternative is to have the debugger arrange 
every instruction which has the advantage of 
a more fool proof operation. But, it suf- 
fers from program complexity and a tenden- 
cy toward slow execution which is critical in 
some 10 operations. 

The debugger ideally should be immune 
to anything which the problem program 
might try to do to it. This suggests the use of 
ROM (Read Only Memory). After you have 
the debugger working to your satisfaction, 
just place the debugger somewhere in your 
memory address space where you'll probably 



Figure 4: Physical arrangement of debugger 
in memory. 



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MEMORY 
ADDRESS 
► 



LOW 



HIGHEST-* 



INTERRUPT CODE 



PROBLEM 
PROGRAM 



DEBUGGER 



IDEAL 
TYPE OF 
MEMORY 

RAM OR ROM 



never need to move it. Usually this is in high 
memory. Since the debugger needs a small 
amount of RAM (Random Access Memory) 
in order to save the problem program's 
registers between G instructions, it cannot 
be made completely invulnerable. If the 
problem program happens to move garbage 
into the interrupt vectors, there is no telling 
what will happen on the next interrupt. But 
this is better than having the debugger 
completely in RAM. As a practical note, 
however, we found that there were not too 
many occasions when the problem program 
zapped the debugger if it was in RAM (figure 

4). 

If you want to get really fancy, you could 
include in the debugger an option to per- 
form loading functions, such as retrieving a 
program off cassette tape. Assuming the 
debugger is in ROM you would never have to 
toggle in a bootstrap loader again, which is 
undoubtedly one of the worst aspects of 
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loader via the debugger, which is certainly 
easier than using the front switches. 

All in all, we've found that a good online 
debugger program is worth its weight in 
ROM. It will remove some of the worst 
aggravations of using small systems, and 
you'll learn a lot about logical flow of 
control, hardware software interfacing, and 
modularity of programming. 

So let's get in there and STAMP OUT 
THOSE BUGS!" 



Source listings of the debugger are available 
for the SUE 1 1 10. Send one dollar to cover 
duplication and postage to Robert R Wier. 
A version utilizing Intel's 8080 CPU chip 
is in the works, and when available a note 
will appear in B YTE. 



62 



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Microprocessor Update: 
Texas Instruments TMS9900 



INTREO ICO IC3 



HOLD " 
HOLD A ■« 
LOAD 
WB - 

READY - 
WAIT - 
MEMEN •• 
DBIN •. 
RESET - 
IAQ « 
CRUCLK- 



«l-(<>4 



A0-AI4 




INSTRUCTION 



s 



CONTROL 
ROM 





INTERRUPT 
REGISTER 



<V> 



MEMORY 

ADDRESS 

REGISTER 



^S> 



STATUS 
REGISTER 



S5_ w 



ALU 
F 



^ — ° — 7 

\ MULTIPLEXER / 



:t i ^* — 



SHIFT 
COUNTER 



SOURCE DATA 
REGISTER 






SHIFT 
REGISTER 



I 16 | 
D0-DI5 CRUIN CRUOUT 

Figure 1 : Internal Block Diagram of the TMS9900 Processor. The internal 
organization of the processor uses a microprogrammed approach. The control 
ROM which is part of the chip is used to store detailed sequences of internal 
operations within an instruction cycle. Programmer accessible memory on the 
chip is limited to the program counter, work space register and status register. 
From a programmer's point of view, nearly all operations concern memory 
which is addressed by bit lines AO to A 14 with data transfers over the bus 
lines DO to Dl 5. 



Robert Baker 
34 White Pine Dr 
Littleton MA 01460 



The TMS9900 microprocessor is a single 
chip, 16 bit central processing unit that 
requires power supplies of +5V, -5V and 
+12V, as well as a four phase, 3 MHz clock. 
Fast interrupt response and programming 
flexibility is provided by the implementation 
of a unique memory to memory architecture 
with multiple register files resident in memo- 
ry. The instruction set includes hardware 
multiply and divide instructions making the 
TMS9900 comparable with many minicom- 
puters. A compatible set of MOS and TTL 
memory and logic function support circuits 
together with separate data and address 
buses help simplify the system design. For 
industrial users, the TMS9900 system is fully 
supported by both software and a proto- 
typing system. Figure 1 shows a functional 
block diagram of the TMS9900 CPU chip 
while figure 2 shows the actual pin assign- 
ments of the 64 pin dual in line package. 
Table I gives a detailed description of each 
pin, grouped by functions for easy reference. 
Photo I illustrates the unique large package 
of this processor. 

Memory 

The maximum addressable memory space 
is 65,536 bytes or 32,768 words. Each 16 
bit memory word also defines two bytes of 8 
bits. The word and byte formats are shown 
in figure 3. All memory word locations are 
even addresses and either the even or the 
odd byte may be addressed by byte oriented 
instructions. 

The first 32 words of memory are used 
for interrupt trap vectors as shown in the 



64 




Photo 1: The TMS9900 
processor is a 16 bit CPU 
with an advanced instruc- 
tion set comparable to 
many minicomputer de- 
signs. It is packaged in this 
unique 64 pin dual in line 
package. The large number 
of pins available to the 
designers allowed the use 
of a fully parallel 16 bit 
data bus and separate 15 
bit address bus. No address 
latching or multiplexing is 
required. 



memory map of figure 4. The next block of 
32 memory words is used by the extended 
operation (XOP) instruction for trap vectors 
while the last two memory words (addresses 
FFFC and FFFE) are used for the trap 
vector of the LOAD signal. The remaining 
memory is available for programs, data, and 
workspace registers as desired. 

Registers 

The first of three internal registers ac- 
cessible to the user is the program counter 
(PC) which contains the address of the 
instruction following the current instruction 
being executed. This register is automatically 
incremented by two after being referenced 
by the processor to fetch the next instruc- 
tion. The status register (ST) records the 
present status of the processor using the bits 
as defined in table 2. The workspace pointer 
(WP) contains the starting address of the 
currently active set of workspace registers. 

The TMS9900 has an advanced memory 



Figure 3: Memory Data Formats. The 
TMS9900 is oriented to a 16 bit word 
length; however, addressing to the byte level 
is assumed. The processor provides the pro- 
grammer with 16 address bits for an address 
space size of 65,536 bytes; actual data 
transfers are 16 bits (two bytes) wide so the 
low order bit is never sent out to the 
memory. Tl documentation uses the bit 
numbering conventions shown here. As is 
the case with most microcomputers, two's 
complement arithmetic is used for integer 
operations. The high order bit of the word 
or byte is treated as the algebraic sign of the 
number. 



to memory architecture utilizing blocks of 
memory designated as workspaces in place 
of internal hardware registers. A workspace 
register file uses 16 contiguous memory 
words of the general random access memory 
area. Each workspace register is a general 
purpose register available to the programmer 
as a temporary storage register, operand 
register, accumulator, address register, or 
index register. In the hardware of the chip, 
individual registers are addressed by adding 
the specific register number to the contents 
of the workspace pointer during instruction 
execution. Several of the workspace registers 
have fixed uses as part of subroutine and 
interrupt linkage conventions. 

This workspace concept allows fast and 
easy process swapping or context switches 
(as in the case of interrupts) by exchanging 
only the PC, ST, and WP. No other register 
saving is required since each process retains 
its own set of general registers which are 
only used by its program. 

Interrupts 

Of the 16 available interrupt levels, Level 
is reserved for the RESET function while 
all other levels may be used for any external 
devices. Level is the highest and level 15 is 



MSB 






























LSB 




2 


3 


4 


5 


6 


7 


8 


9 


10 


1 1 


12 


13 


14 


15 


SIGN 
BIT 

\ 




MSB 


MEMORY WORD (EVEN ADDRESS) 

LSB MSB L5B 





1 


2 


3 


4 


5 


6 


7 


8 


9 


10 


II 


12 


13 


14 


15 


Sign 

BIT 


SIGN 
BIT 
„ * ., ' 



Figure 2: TMS9900 Pin 
Assignments. The 64 pin 
package is probably the 
largest commercially avail- 
able integrated circuit in 
regular production at the 
time of this writing. 

TMS 9900 PIN ASSIGNMENTS 



VBB 
VCC - ■ 
WAIT - - 
LOAD 
HOLDA 
RESET 
IAO 
*l 
*2 
AI4 
AI3 
AI2 
Al I 
A 10 
A9 
A8 
A7 

AB- 
AS 

A4 

A3 

A2 

Al 

AO 

04 

VSS 

VDD 

*3 

D8IN 

CRUOUT 

CRUIN 

INTREO 



NC-NO CONNECTION 



1 


64 


2 


63 


3 


62 


4 


61 


5 


60 


6 


59 


7 


58 


8 


57 


9 


56 


10 


55 


1 1 


54 


12 


53 


13 


52 


14 


51 


15 


50 


16 


49 


17 


48 


18 


47 


19 


46 


20 


45 


21 


44 


22 


43 


23 


42 


24 


41 


25 


40 


26 


39 


27 


38 


28 


37 


29 


36 


30 


35 


31 


34 


32 


33 



- Roup 

MEMEN 

READY 

WE 

CRUCLK 

NC 

NC 

NC 

DI5 

DI4 

DI3 

DI2 

Dl I 

DIO 

D9 

D8 

D7 

D6 

D5 

D4 

D3 

D2 

Dl 

DO 

NC 

NC 

NC 

NC 

ICO 

ICI 

IC2 

IC3 



EVEN BYTE 



ODD BYTE 



POWER 
SYMBOL 

VBB 
VCC 
VSS 
VDD 



VOLTAGES 



2 
26 
27 



VALUE 

-5V 
+ 5V 
GND (OV) 
+ I2V 



65 



The TMS9900 is the first 
generally available single 
chip processor to provide 
hardware multiply and di- 
vide instructions. 



Information and diagrams 
in this article are based 
upon the TMS9900 Micro- 
processor Data Manual, 
courtesy of Texas Instru- 
ments Inc. 



the lowest priority level. Several devices may 
share any external level (1 to 15) as desired. 
The interrupt code (ICO to IC3) is con- 
tinuously compared with the interrupt mask 
(ST bits 12 to 15). The processor will 
recognize an interrupt if the pending inter- 
rupt level is less than or equal to the 
interrupt mask level. Following completion 
of the current instruction an acknowledged 
interrupt will cause a context switch. The 
new WP and PC will be obtained from the 
interrupt vector locations and the previous 
WP, PC, and ST are stored in workspace 
registers 13, 14, and 15, respectively, of the 
new workspace. The interrupt mask is set to 
one less than the level being serviced (except 
for level which loads 0) to allow only 
higher priority interrupts to be recognized. 



Interrupts are inhibited until the first in- 
struction of the service routine has been 
executed to preserve program linkage in case 
of higher priority interrupts. All pending 
interrupt requests should remain active until 
recognized and each service routine should 
terminate with the return instruction 
(RTVVP) to restore the original parameters. 
Figure 5 illustrates a typical TTL interrupt 
interface with priority encoding while table 
3 gives detailed interrupt level data. 

Input and Output: The Communications 
Register Unit (CRU) 

Up to 4096 directly addressable input 
bits and 4096 directly addressable output 
bits are provided by the communications 
register unit (CRU) which is a direct, com- 



Table I: Detailed Descrip- 
tion of TMS9900 Pins. 
This table lists the various 
pins of the TMS9900 
along with an explanation 
of the purpose and use of 
the signals. 



SYMBOL 


PIN 


10 


DESCRIPTION 








ADDRESS BUS 


AO (MSB] 


24 


OUT 


AO through A14 comprise the address 


A1 


23 


OUT 


bus. This 3 slate bus provides the mem- 


A2 


22 


OUT 


ory address vector to the external 


A3 


21 


OUT 


memory system when MEMEN is active 


A4 


20 


OUT 


and 10-bil addresses and external in- 


A5 


19 


OUT 


struction addresses to the 10 system 


A6 


18 


OUT 


when MEMEN is inactive. The address 


A7 


17 


OUT 


bus assumes the high impendance state 


A8 


16 


OUT 


when HOLDA is active. 


A9 


15 


OUT 




A10 


14 


OUT 




All 


13 


OUT 




A12 


12 


OUT 




A13 


11 


OUT 




A14 ILSBI 


10 


OUT 


DATA BUS 


DO (MSB) 


41 


10 


DO through D15 comprise the bidirec 


Dl 


42 


10 


tional 3 state data bus. This bus transfers 


D2 


43 


10 


memory data to (when writing) and 


D3 


44 


10 


Irom (when reading) the external memo- 


D4 


45 


10 


ry system when MEMEN is active. The 


D5 


46 


10 


data bus assumes the high impedance 


D6 


47 


10 


state when HOLDA is active. 


D7 


48 


10 




D8 


49 


10 




D9 


50 


10 




D10 


51 


10 




Dll 


52 


10 




D12 


53 


10 




D13 


54 


10 




D14 


55 


10 




D15ILSBI 


56 


10 


POWER SUPPLIES 


V B B 


1 




Supply voltage I-5V NOM) 


vcc 


2 




Supply voltage (5V NOM) 


V D D 


27 




Supply voltage!! 2V NOMI 


vss 


26 




Ground relerence 

CLOCKS 


01 


8 


IN 


Phase 1 clock 


02 


9 


IN 


Phase 2 clock 


03 


28 


IN 


Phase 3 clock 


04 


25 


IN 


Phase 4 clock 



DBIN 

MEMEN 

WE 

CRUCLK 

CRUIN 



ICO (MSB) 

IC1 

IC2 

IC3 (LSB) 



IAQ 
LOAD 



PIN 


10 


29 


OUT 


63 


OUT 


61 


OUT 


60 


OUT 


31 


IN 


30 


OUT 


32 


IN 


36 


IN 


35 


IN 


34 


IN 


33 


IN 


64 


IN 


5 


OUT 


62 


IN 


3 


OUT 


7 


OUT 


4 


IN 


6 


IN 



DESCRIPTION 



BUS CONTROL 



When active (high). DBIN indicates that the TMS9900 has disabled i ts outp ut 
buffers to allow the memory to place memoiy-read data on the data bus during MEMEN. 



active (low), MEMEN indicates that the address bus contains a 



Data bus 
buffers t( 

DBIN remains low in all other cases except when HOLDA is active. 

Memory enable. When 
memory address. 

Write enable when active (low), WE indicates thai memory-write data is available from the 
TMS9900 to be written into memory. 

CRU clock. When active (high), CRUCLK indicates that external interface logic should 
sample the output data on CRUOUT or should decode external instructions on AO through 
A2. 

CRU data in. CRUIN, normally driven by 3 state or open collector devices, receives input 
data from external interface logic. When the processor executes a STCR or TB instruction, it 
samples CRUIN for the level of the CRU input bit specified by the address bus (A3 through 

A14). 

CRU data Out. Serial 10 data appears on the CRUOUT line when an LOCR, SBZ. or SBO 
instruction is executed. The data on CRUOUT should be sampled by external 10 interface 
logic when CRUCLK goes active (high). With software drivers the CRU serial interface can 
be used in place of a UART or similar conversion IC. 

INTERRUPT CONTROL 

Interrupt req uest. Wh en active (low), INTREQ indicates that an external interrupt is 
requested. If INTREQ is active, the processor loads the data on the interrupt code input 
lines ICO through IC3 into the internal interrupt code storage register. The code is compared 
to the interrupt mask bits of the status register. If equal or higher priority than the enabled 
interrupt level (interrupt code equal or less than status register bits 12 through 15} the 
TMS990 interrup t sequence is initiated. If the comparison fails, the processor irjnores the 
request. INTREQ should remain active and the processor will continue to sample ICO 
through IC3 until the program enables a sufficiently low priority to accept the request 
interrupt. 



INTREQ is 
ipt is being 



Interrupt codes. ICO is the MSB of the interrupt code, which is sampled when 
active. When ICO through IC3 are LLLH, the highest external-priority mterr 
requested and when HHHH, the lowest-priority interrupt is being requested. 

MEMORY CONTROL 

Hold. When active (low), HOLD indicates to the processor that an external controller (e.g., 
DMA device) desires to utilise the address and data buses to transfer data to or from 
memory. The TMS9900 enters the hold state following a hold signal when n has completed 
its present memory cycle. The proc esso r then plac es the address and data buses m the 
high-impedance state (along with WE, MEMEN , and DBIN) and responds with a 
hold-acknowledge signal (HOLDA). When HOLD is removed, the processor returns to 
normal operation. 

Hold acknowledge. When active (high), HOLDA indicates that th e pr o cessor is in the hold 
state and the address and data buses and memory control outputs (WE, MEMEN, and DBIN) 
are in the high impedance state. 

Ready. When active (high), READY indicates that memory will be ready to read or write 
during the next clock cycle. When not-ready is indicated during a memory operation, the 
TMS9900 enters a wait state and suspends internal operation until the memory systems 
indicate ready. 

Wait. When active (high), WAIT indicates that the TMS9900 has entered a wait state because 
of a not ready condition from memory. 

TIMING AND CONTROL 

Instruction acquisition. IAQ is active (high) during any memory cycle when the TMS9900 is 
acquiring an instruction. IAQ can be used to detect illegal op codes. 

Load. When active (low), LOAD causes the TMS9900 to execute a nonmaskable interrupt 
with memory address FFFCig containing the trap vector (WP a nd PC). The load sequence 
begins af ter the instruction being execut ed is co mpleted. LOAD will also te rminate an idle 
state. If L OAD is active during the time RESET is released, then the LOAD trap will occur 
after the RESET function is completed. LOAD should remain active for one instruction 
period. IAQ can be used to determine instruction boundaries. This signal can be used to 
implement cold-start ROM loaders. Additionally, front-panel routines can be implemented 
using CRU bits as front-panel-interface signals and software-control routines to control the 
panel operations. 



Reset. When acti ve (low) , RESET causes the processor to be reset and inhibits WE and 
CRUCLK. When RESET is released, the TMS9900 then initiates a level zero interrupt 
sequence that acquires WP an d PC fro m locations 0000 and 0002, sets all statu s register btts 
to zero, and starts execution. RESET will also terminate an idle state. RESET must be held 
active for a minimum of three clock cycles. 



66 



STATUS REGISTER 


BIT 




NAME 


STO 




LOGICAL GREATER THAN 


ST1 




ARITHMETIC GREATER THAN 


ST2 




EQUAL 


ST3 




CARRY 


ST4 




OVERFLOW 


ST5 




PARITY 


ST6 




XOP 


ST7- 


ST11 


not used (^0} 


ST12 


- ST15 


INTERRUPT MASK 



Table 2: Status Register Format. The 16 bit 
status register contains flags which are set 
during execution of programs. These flags in 
turn can be tested and manipulated under 
program control. 

mand driven 10 interface. Three dedicated 
10 pins (CRUIN, CROUT, CRUCLK) and 12 
bits of the address bus (A3 to A14) are used 
to interface to the CRU system, allowing 
input and output bits to be addressed 
individually or in fields of one to 16 
bits. Any bit in the CRU array may be 
set, reset, tested, or moved between mem- 
ory and the CRU data field by any 
ot the various CRU single or multiple 
bit instructions using bits 3 to 14 of 
workspace register 12 to address the desired 
CRU bits. When executing multiple bit CRU 
operations, the data bits are right justified in 
byte or word locations depending on the 
number of data bits. The addressing scheme 
used for multiple bit CRU transfers results in 
an order reversal of the bits; bit 15 of the 
memory word (or bit 7 if a byte) is the first 
bit to be sent or the first bit received while 
bit becomes the last possible bit in the 
CRU field. Figure 6 illustrates the bit re- 
versal for multiple bit transfers while figure 
7 shows how to construct a typical 16 bit 10 
port. By decoding the CRU addresses, up to 
256 such 16 bit interface registers may be 
implemented. Typically, only the exact 
number of interface bits required for a 
specific device will be utilized. 

Several timing and control signals are 
available for use in implementations of ROM 
loaders, front panel service routines, a 
processor hold condition, slow memory 
cycles and DMA transfers. A wait state is 
available for use with DMA or slow memory. 
Table 1 includes detailed descriptions of 
each timing and control signal that is 
available. 

Five external instructions (CKON, CKOF, 
RSET, IDLE, LREX) provide a means of 
initiating any desired user defined external 
functions. IDLE will also cause the 
TMS9900 to ente r th e idle state until an 
interrupt, RESET, or LOAD occurs. When 
any of these five instructions are executed, a 
unique three bit code will appear on bits AO 
through A2 on the address bus along with a 
CRUCLK pulse. 



AREA DEFINITION 



INTERRUPT VECTORS 



XOP SOFTWARE TRAP VECTORS 



MEMORY 
ADDRESS |6 



0000 
0002 
0004 
0006 



003C 
003 E 
0040 
0042 



007C 
007E 



MEMORY CONTENT 



WP LEVEL INTERRUPT 



PC LEVEL O INTERRUPT 



WP LEVEL I INTERRUPT 



PC LEVEL I INTERRUPT 



WP LEVEL 15 INTERRUPT 



PC LEVEL 15 INTERRUPT 



WP XOP 



PC XOP 



GENERAL MEMORY FOR PROGRAM, <■ 
DATA, AND WORKSPACE REGISTERS 



LOAD SIGNAL VECTOR 



{ 



FFFC 
FFFE 



WP XOP 15 



PC XOP 15 



GENERAL MEMORY AREA 

MAY BE ANY COMBINATION OF 
PROGRAM SPACE OR 
WORKSPACE 



WP LOAD FUNCTION 



PC LOAD FUNCTION 



Figure 4: Memory Allocations of the TMS9900. The TMS9900 has a large 
complement of dedicated locations in memory address space. Interrupt 
vectors are found in the first 32 words of memory; XOP instruction trap 
vectors are found in the second contiguous block of 32 words; memory 
addresses FFFC and FFFE (hexadecimal) are reserved for the load signal 
vector which defines the location and workspace address of the first program 
to receive control at system initialization time. The rest of memory address 
space (hexadecimal locations 0080 to FFFB) is available for general purpose 
use as RAM or ROM depending upon system design details. 



INTERRUPT SIGNAL I 
{ highest priority ) 




INTREO 
TEXAS 
INSTRUMENTS 

. TMS 
IC0 9900 



POWER CONNECTIONS 



IC +5V 


GND 


74 I 4 8 1 6 


8 


7408 14 


7 


7404 14 


7 


TMS9900 SEE 


FIGURE 2 



INTERRUPT SIGNAL 15 
( lowest priority } 



Figure 5: Typical Interrupt Priority Logic. The TMS9900 uses memory 
address space locations hexadecimal 0000 to 003F as interrupt vectors. One 
of the 16 double word interrupt vector s is picked by the binary pattern found 
on lines ICO to IC3 at the time of the INTREQ signal. This circuit shows one 
way to generate interrupt vector codes using two priority encoders (74148) 
and some miscellaneous gates. 



67 





Vector Location 




Interrupt Mask Values to 


Interrupt 


Interrupt Level 


(Memory Address 


Device Assignment 


Enable Respective Interrupts 


Codes 




in Hex) 




IST12thruST15) 


ICO thru IC3 


(Highest priority) 


00 


Reset 


through F* 


0000 


1 


04 


External Device 


1 through F 


0001 


2 


08 






2 through F 


0010 


3 


OC 






3 through F 


001 1 


4 


10 






4 through F 


0100 


5 


14 






5 through F 


0101 


6 


18 






6 through F 


0110 


7 


1C 






7 through F 


0111 


8 


20 






8 through F 


1000 


9 


24 






9 through F 


1001 


10 


28 






A through F 


1010 


11 


2C 






B through- F 


101 1 


12 


30 






C through F 


1 100 


13 


34 






D through F 


1101 


14 


38 


" 


E and F 


1110 


(Lowest priority) 15 


3C 


External Device 


F only 


1111 



* Level can not be disabled. 



Table 3: Interrupt Level Data. The priority interrupt system of the TMS9900 
provides 16 separate levels with corresponding vectors in main memory. The 
highest priority interrupt is reserved in hardware for the reset function. All 
the other 15 interrupt levels can be assigned to external devices when a 
system is wired using this processor. 



Figure 6: Control Register 
Unit Data Transfers. The 
TMS9900 uses the concept 
of a 4096 bit Control Reg- 
ister Unit address space for 
programmed 10 transfers. 
This is a bit addressable 
space accessed by the 
STCR and LDCR instruc- 
tions. Transfers to and 
from the CRU map ac- 
cording to the diagram 
shown here, and can in- 
volve up to a full 16 bit 
word of information. 
Within the 4096 bit limit, 
as many CRU locations as 
required can be imple- 
mented in any given 
TMS9900 oriented system. 



Figure 7: A CRU Exam- 
ple, This diagram shows 
the logic of a 16 bit CRU 
segment implemented with 
TTL (low power Schott- 
ky) integrated circuits. 
Note that a drawing con- 
vention of double lines 
with notation of the num- 
ber of signals is used to 
represent multiple path 
bus interconnections. 



CRU 

INPUT 

BITS 



N 
N + l 



N+14 
N+15 



INPUT (STCR) 

n 

[0| I |2 |3 |4|Ji|ll |I2|I3|I4|I5 



T-DATA AT EFFECTIVE 
MEMORY ADDRESS 

OUTPUT (LDCR) 



CRU 

OUTPUT 

BITS 



N + 14 
N+15 



N = BIT SPECIFIED BY CRU BASE REGISTER 



Instruction Set 

The TMS9900 instruction set, as shown 
in table 4, consists of 67 instructions. These 
instructions include arithmetic, logical, com- 
parison or manipulation operations on data; 
loading or storage of internal registers; data 
transfer between memory and external de- 
vices via the CRU; and processor control 
functions. 

The individual instruction execution 
times are a function of the clock cycle time, 
the addressing mode used, and the number 
of wait states required per memory access. 
There are eight different addressing modes 
available for addressing both random and 
formatted memory data .as illustrated in 
figure 8. Not all addressing modes, however, 
are usable with every instruction. 
System Design 

A typical minimum system is shown in 
figure 9 with a single 8 bit 10 port. A total 
package count of 15 packages includes the 
chips for 1024 words of ROM and 256 
words of RAM memory. A general larger, 
more flexible system is illustrated in figure 
10. The clock generator and control section 
would include the memory decode logic and 
synchronization logic as well as the clock 
electronics. Buffers would be required as 
indicated on all of the system buses to drive 
the increased loads. Various data and control 
interfaces are shown in general form since 
these would usually be designed for specific 
applications. As with many of the more 



A 12 TO A 14 















AI4 






' 




1 All 


i ,r a 

i 


I /■ ;»T0 MEMORY 




t . 




2 
3 

4 
5 
6 
7 


74LS25I 

8 TO 1 
MUX 


A 

B 
C 
S 

Y 




O 




3 , 




AI3 




4 \J3 

SN74LS04 




2 . 




AI2 




' , 


> 






* 














24 TO 10 




14 . 


31 


CRUIN A0-AI4 

TMS 9900 
CPU 

CRUCLK 
CRUOUT 




13 . 




AI4 


- 


, 3 


1 






12 : 


























t . 



1 

2 
3 
4 
5 
6 
7 


74LS25I 

8 TO 1 
MUX 


A 
B 
C 
S 

Y 






3 , 




AI3 






2 . 


, AIZ 






60 




1 








30 




15 '. 






AI2 TO AI4 
,3 




14 r 




13 r 










>?: 


' 




























O 
1 

2 
3 
4 
5 
6 
7 


74LS259 

8 BIT 
LATCH 


D 
A 
B 
C 
G 










AI4 ' 




SN74LSOO 
S ' 1 ' 




























A 12 








4l TO 56 










3 e/ 


2 














v_ 


'? ^ 


/IEM0R 










t f TO 




AI2 TO AI4 
,3 

SN74LSOO 


DO TO DI5 



























1 

2 
3 
4 
5 
6 
7 


74LS259 

B BIT 

LATCH 


D 
A 
B 
C 
G 










AI4 










AI3 








AI2 




4 






3- 




6 _f 










v_ 


5 














* 







68 



advanced microprocessor companies, Texas 
Instruments also sells the TMS9900 in 
packaged form as illustrated in photo 2. 

Conclusions 

The TMS9900 appears to be a powerful 
16 bit microprocessor with many features of 
interest to the computer hobbyist. The 
advanced interrupt and IO system in addi- 



MNEMONIC 


DESCRIPTION 


AB 


Add bytes 


ABS 


Absolute value 


Al 


Add immediate 


ANDI 


AND immediate 


B 


Branch 


BL 


Branch and link 


BLWP 


Branch and load workspace do 


C 


Compare 


CB 


Compare bytes 


CI 


Compare immediate 


CKOF 


User defined 


CKON 


User defined 


CLR 


Clear operand 


COC 


Compare ones corresponding 


CZC 


Compare zeroes corresponding 


DEC 


Decrement 


DECT 


Decrement by two 


DIV 


Divide 


IDLE 


Idle processor 


INC 


Increment 


INCT 


Increment by 2 


INV 


Invert 


JEQ 


Jump equal 


JGT 


Jump greater than 


JH 


Jump high 


JHE 


Jump high or equal 


JL 


Jump low 


JLE 


Jump low or equal 


JLT 


Jump less than 


JMP 


Jump unconditional 


JNC 


Jump no carry 


JNE 


Jump not equal 


JNO 


Jump rio overflow 


JOC 


Jump on carry 


JOP 


Jump odd panly 


LDCR 


Load communication register 


LI 


Load immediate 


LIMI 


Load interrupt mask 


LREX 


User tiffined 


LWPI 


Load workspace pointei unmet 


MOV 


Move 


MOVB 


Move bvtes 


MPY 


Multiply 


NEG 


Negate 


ORI 


OR immediate 


RSET 


Reset 


S 


Subtract 


SB 


Subtract bytes 


SBO 


Set bit to one 


SBZ 


Set tilt to Zfin 


SETO 


Set In ones 


SLA 


Shilt left arithmetic 


SOC 


Set ones cot responding 


SOCB 


Set ones cor r espnndnig bytes 


SRA 


Sfult right arithmetic 


SRC 


Shilt tight ceculai 


SRL 


Sin 1 1 r ight logical 


STCR 


Store communication registei 


STST 


Store status registei 


STWP 


Storr; woi kspace pointei 


SWPB 


Swap bytes 


szc 


Set zeroes corresponding 


SZCB 


Set zeroes corresponding bytes 


TB 


Test bit 


X 


Execute 


XOR 


Exclusive OR 



Table 4: TMS9900 Instruction Set. this Is 
an alphabetical lis! of the mnemonics and 
description of each instruction. The details 
of operation codes and addressing modes 
available for each instruction are found in Tl 
literature on the system. 



Figure S: Addressing Modes of the TMS9900. The TMS9900 has a very 
complete set of memory address calculation modes available to its various 
instructions. Not all the modes are available to every instruction. 

WORKSPACE REGISTER ADDRESSING R 

Workspace Registei R contains the operand. 



REGISTER R 



(PO- 



INSTRUCTION -»(wr)+2R 



OPERAND 



WORKSPACE REGISTER INDIRECT ADDRESSING *R 

Workspace Registei R contains the address of the operand. 



INSTRUCTION 





REGISTER R 






(WP) + 2R-» 


ADDRESS 




OPERAND 





WORKSPACE REGISTER INDIRECT AUTO INCREMENT ADDRESSING *R+ 

Workspace Register R contains the address of the operand. Upon completion of the 
operation, the contents of workspace register R are incremented. 

REGISTER R 

(PC) 



INSTRUCTION -»(WP)»2R-» ADDRESS 




OPERAND 



■ + u i I (BYTE) 

or 2 (WORD) 



SYMBOLIC (DIRECT) ADDRESSING @ LABEL 

The word following the instruction contains the address of the operand. 



(PC) 
(PC) + 2-» 



INSTRUCTION 



►| OPERAND 



INDEXED ADDRESSING @ TABLE (R) 

The word following the instruction contains the base address. Workspace register R 
contains the index value. The sum of the base address and the index value results in the 
effective address of the operand. 

REGISTER R 

(PC)— ► ! INSTRUCTION [ -»•( WP) + 2 R-» f~INOEX VALUE | - 



(PC) + 2-» \ TABLE~ 



3 



►| OPERAND 



IMMEDIATE ADDRESSING 

The word following the instruction contains the operand. 



IPCI- 
(PO+2- 



INSTRUCTION 



PROGRAM COUNTER RELATIVE ADDRESSING 

The 8 bit signed displacement in the right byte (bits 8 through 15) of the instruction is 
multiplied by 2 and added to the updated contents of the program counter. The result is 
placed in the PC. 

JUMP INSTRUCTION 



PROGRAM COUNTER 


OP CODE DISP 




V^ 


| ADDR 


-e c 


NEXT MEMORY WORD 


)*1 


I f * 




l 













CRU RELATIVE ADDRESSING 

The 8 bit signed displacement in the right byte of the instruction is added to the CRU 
base address (bits 3 through 14 of the workspace register 12). The result is the CRU 
address of the selected CRU bit. 



INSTRUCTION 



(PC) — ► ] OP CODE [ DISP 

O 78 15 



REGISTER 12 

I CRU Base Add 




69 



Photo 2: As is the case 
with a number of the 
microprocessor manu- 
facturers, Texas Instru- 
ments supplies the 
TMS9900 part separately 
or integrated with other 
components to form the 
card and cabinet oriented 
modules illustrated here. 
For industrial and com- 
mercial users who desire 
even higher speed com- 
puting, there is also a more 
expensive (but software 
compatible) version imple- 
mented with ordinary TTL 
logic. 




c 



ADDRESS BUS 



1 4 

(ITS ) 
N -{ 

4 



8 

BITS 

OUT 



INTERRUPT CODE . 
INTERRUPT REQUEST - 



DB_IN 
WE 



CRUIN 



CRUOUT 

TMS9900 
CRUCLK CPU 



IC0-IC3 



INTREO 



DO- A 
DI5 ^ 



ROM 

TMS 4700 







\l 



a* 



RAM 

TMS 4042 



U_ TT 



CLOCK 
GENERATOR 



Figure 9: A Small System. The TMS9900 design, while quite general purpose 
in nature, does not necessarily have to be built into a general purpose system. 
A small system might consist of (for example) 8 bits ofCRU, the CPU, clock 
generation modules, a small amount of RAM and some ROM for fixed 
programs. 




IS ' ' "> 

CLOCK GENERATOR 
I AND CONTROL « 



Figure 10: Larger Systems. With buffering, the TMS99U0 processor can 
become the central figure of much larger computing systems, with much of 
the power of the traditional minicomputer. Here is a sketch of such a larger 
system. 



don to flexible memory and processor con- 
trol make many desired system designs 
simple to implement. Also, the workspace 
concept may provide several new software 
capabilities that are greatly needed in the 
microcomputer field today. As a final com- 
ment in passing: IBM 360/370 lovers should 
take note of the similarities between the 
TMS9900 general register architecture and 
the IBM large scale computers." 

GLOSSARY 

Contiguous: Adjacent in sequential order. Several 
memory words located at sequential addresses in 
memory address space are said to be contiguous 
with one another. 

Context changes: When it is necessary to begin a 
new program upon interrupting or returning from 
an executing program, the state of the CPU 
changes. This is a context change. The TMS9900 
provides a very efficient and complete context 
change mechanism in hardware which guarantees 
that all working registers and status information 
are changed in an orderly fashion. 

Extended Operations (XOP): The TMS9900 con- 
tains a facility not found in many of the early 
microcomputer designs: a set of XOP instructions 
which allow 16 user-programmed functions to be 
called; the XOP's effective address calculation is 
used to set up parameters which are available to 
the XOP service routine. A special set of trap 
vectors is accessed by the XOP instructions. 

Memory to Memory: Many microprocessors to 
date have employed an accumulator oriented archi- 
tecture which requires at least one operand to be 
an on chip register; in contrast, the memory to 
memory design of the TMS9900 is oriented toward 
the use of two memory operands. 

Process swapping: See context changes. 

Trap: A technique of computer design which 
provides a mechanism to detect certain software 
conditions and cause interrupts. A trap vector is a 
set of information stored in the computer's 
memory for purposes of accessing a subroutine 
designed to handle the trap condition. For the 
TMS9900 trap a vector consists of the address of 
the subroutine and the address of the workspace 
for the subroutine. 



70 



continued from page 10 

quite useful. I enjoyed the series on LIFE in 
particular. Being a LIFE addict from way 
back, I shall have to implement the game on 
my 6800 system once it comes online. 

There is at least one thing that I have 
noticed missing from among the articles, and 
that is something on the use of a micro for 
the purpose of sending and receiving RTTY 
on the amateur bands. Being an amateur 
myself, and involved in VHF FM work, I 
plan on setting up the necessary hardware 
and software to use my system as a radio 
Teletype converter. 

Along the same lines, I also plan on 
writing the programs necessary to trans- 
literate hand sent Morse code to printed 
letters. The little information that I have 
about the algorithms to do this with are 
gleaned from a Scientific American article 
circa 1960, so perhaps there have been 
better ways discovered since then. If so, I 
wonder if any of your readers might clue me 
in to some references on the subject of 
computer pattern recognition, which is the 
basis for any work such as this. 

Keep up the good work, and I will be 
watching with interest to see where things go 
from here. 

Richard Fall 

PO Box 3486 

Stanford CA 94305 

COMMENTS ON 
COMPUTER MEGALOMANIA 

A Von Mises fan, I learned my lesson the 
easy way ("A Lesson in Economics"), having 
started my subscription with BYTE #1 . 
Congratulations on the excellent job you 
have done to date. 

Suggestion: put BOMB & the BYTE 
questionnaire on a card — I'm not about to 
rip up my BYTE or travel two miles to the 
nearest Xerox machine to make one copy. I 
know of all the languages on your question- 
naire and have used most of them, but I 
noticed one glaring omission: APL. It is one 
of the best languages in existence (in terms 
of conciseness, consistency, flexibility, ease 
of use and scope of application). 

The author of "Could a Computer Take 
Over?" made the comment: "Computer 
technology is already far outstripping man's 
capability of harnessing it." No way! There 
are many problems (and more turning up 
daily) from the fields of mathematical 
physics or molecular biochemistry (just to 
name a few) that can easily swamp com- 
puters a trillion times faster than today's 
fastest computers. Another comment made 
was: "Would government by computer really 
be all that bad? In a case such as that in The 



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VT-1920 

Complete CRT terminal with monitor, keyboard, housing, 

interface for 8080 CPU and power supply Kit-$695.00 

MTS-8 

All the features of the VT-1920 above plus 8080 CPU, 1 K bytes 

of ROM, 4K bytes of RAM, serial interface, cassette interface, 

assembler editor and debug software. Kit— $1 195.00 

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All systems have 80 character by 24 line display capacity but use 
only as much memory as characters displayed, because our 
terminals share memory with the computer and can be expanded 
to 64K bytes. Scrolling is under cursor control to any location 
and any number of lines limited only by available RAM memory, 
either line by line or page by page. 



M 



A 



MIKRA-D 
P.O. Box 403 
Holliston Mass 01746 

TEL. 617-881-3111 



71 



Moon Is A Harsh Mistress, the answer would 
be no." However, this is not a case of 
computer as government but computer as 
guerilla since MIKE (the computer) helped 
Professor De La Paz (the rational anarchist) 
overthrow the existing government and pre- 
vent any "real" government from rccmcrg- 
ing. Nevertheless I liked the article. 

Keep up the good work. Best regards 
from Silicon Valley, 

Conrad Schneiker 
Mountain View CA 



Readers will note that reader's service and 
subscription forms are incorporated as a 
separate card beginning this month. The 
economics of mass production prevent 
putting BOMB or the questionnaire on the 
card. 

WHO ARE YOU TRYING TO KID? 

I got my February issue of BYTE 
recently, my first issue. You have an 
excellent magazine, well worth the subscrip- 
tion price. 

But who are you trying to kid? On page 
1 4 of February BYTE you show a picture of 
a two story building in which, according to 



?V 




the text, you are located on the fourth 
floor! What's up? 

A Smith 
St Louis MO 



The picture is real, and the text is correct. 
The entrance to the building shown in 
February BYTE reaches the third floor, 
since the building is nestled into a hillside. 
As evidence of the fourth floor location of 
our offices, Ed Crabtree recently lay down 
in a snowbank, pointed his camera toward 
the sky, and took this picture of our offices 
from a different vantage point. 



JOIN THE CLUB? 

I read a very interesting editorial by Carl 
Helmcrs in the February issue of BYTE 
magazine. Its headline is similar to this one. 
As Mr Helmcrs described a national personal 
computer society I started reaching for my 
checkbook and a self addressed stamped 
envelope. I don't care what it costs, I want 
to join. But in the last chapter, as in Don 
Quixote, the Knight of the Mirrors brings 
reality home with a vengeance. The enemy is 
us. 

My interpretation of Mr Helmcrs' closing 
remarks is: If it looks like a duck, walks like 
a duck, quacks like a duck, it is most 
certainly a duck even if it calls itself the 
Southern California Computer Society. 
Sadly I gave up the vision of the Great 
Galactic Computer Cavalry riding to our 
rescue and went to the 942nd daily meeting 
of the Trivia and Tedium Standards Com- 



If you glue enough hang- 
nails together, you get 
Frankenstein. 



mittec. The world has again proven that if 
you glue enough hangnails together, you get 
Frankenstein. 

The stark naked truth is that we have no 
plausible defense against Mr Helmcrs' 
charges. In fact we are lucky he didn't 
expand the indictment to include "Inter- 
national Society," which we can not deny 
cither. I think it is unfair that he did not 
include a few mitigating facts, such as our 
370-158 group purchase fiasco and the total 
lack of attendance at our Lunar Chapter 
meetings. With just a few more well planned, 
superbly executed disasters, we might have 
escaped this one. 

The dastardly attack on The Society 



72 



name seems strange and somehow provincial 
from an organization aspiring to nationwide 
scope. At the venerable age of four months 
the acronym SCCS is at least as recognizable 
as SPQR, which was a fairly active society in 
its day. If our name is objectionable: so be 
it. We do not aspire to the kingdom, the 
power, and the glory. We just hope to help 
the next guy who wants to know which is 
pin 1. 

Our first and foremost goal in our charter 
is to provide the best possible service to 
anyone who asks. But we demand a heavy 
fee: the same caliber of service to the next 
one who asks. On this premise and this name 
our organization stands, and all are welcome 
to join. There is no residence requirement 
nor any other impediment. We arc not the 
new Genghis Khan astride a 40 legged horse 
called 8080 sweeping out of the West to cut 
the Gordian Knots of Computerdom. We are 
building the tools to pry open Pandora's Box 
and show computers for what they arc and 
what they might become. 

The name of our publication, Interface, is 
probably also misunderstood. The computer 
interface is usually understood to be the 
common boundary between two subsystems. 
If the computer interface is proper, the 
boundary disappears; and the whole be- 
comes greater than the sum of the parts. 
This is why our Interface has become our 
flag ship. We have a message, we have a 
voice, we will speak, and we will be heard. 

Lest anyone mistake our clarity of pur- 
pose for ambition, note that we have not 
asked Jeff Landry to change his name to Jeff 
Lcndry to preserve our image. Also note that 
the illustrious founder of Interface, Jon 
Walden, must look down from the Pantheon 
at the January issue where his name is wrong 
three times in three tries. The bell tolls for 
you, Art Childs. 

Returning to this scurrilous attack from 
BYTE; beware, Carl Helmers, the august 
president of SCCS is not powerless. One 
more outburst of this nature and we shall 
resort to the violence vested in me and name 
you honorary member and chairman of The 
Colossal Name Committee. (And publish 
your secret, unlisted phone number. We 
haven't been infiltrated by the CIA for 
nothing!) On guard, Sir, defend yourself! 

If we can get back to our real business, 
we have a lot of work to do. We arc building 
one brick at a time and we arc competent 
builders. We will continue to do our best. 

Ward Spaniol 
President, SCCS 
Los Angeles CA 



The 
UN-COMPUTER 




Introducing a new way to begin an Altair system. The MICRO-A LTAIR™ from Polymorphic 
Systems is a complete computer system, requiring just a keyboard and TV monitor lor modified 
receiver) for use 

The MICRO-ALTAIR™ consists of our video board with graphics capability, CPU/ROM/RAM board, 
backplane with power supply, and cabinet. 

The CPU board includes an 8080 processor, 512 bytes of RAM, space for 3K bytes of ROM and 
vectored interrupts. Several CPU boards may be plugged into the same back plane for parallel processing. 
The backplane design is unique in that it allows many backplanes to be plugged together for easy 
system expansion. Each backplane contains its own power supply (transformer mounted externally) 
rated at 8 volts at 6 amps and t 18 volts at V> amp. 5 boards may mount in each backplane assembly. 
Included with each system is a resident operating system contained on a PROM which plugs 
into the CPU board. The operating system implements a versatile file system, provides 
program debusing aids, handles input and output concurrently with program execution, 
provides job scheduling and a real-time clock. Data may be entered and listed in octal, 
hexidecimal, or ASCII and edited on the TV screen. Files may be read from or written 
onto external devices such as a cassette tape. Program debugging aids include software breakpoints 
which allow all CPU registers to be displayed at any point in the program execution. 
An important feature of the MICRO-ALTAIR™ is its compatibility with Altair peripherals 
and software which are available from several manufacturers. 

PRICES: 

Cabinet and power supply S 155.00 

Processor board (includes RAM, real time clock and vectored interrupt) ... 195.00 

Video interface board {with 8-bit input port) 160.00 

Operating system on PROM 65.00 

2 1 00 pin connectors 17.00 

The complete system purchased separately S 592.00 

SPECIAL: INTRODUCTORY OFFER $475.00 

This oiler applies only to orders accompanied by check or money order and postmarked 
before April 15, 1976 We believe this is one of the best deals going ;n a computer kit, 
check our prices and compare. Delivery 60 days. 




Video I 



. Plugs into th 

jr| 8-bit input co 



IMSAI 8800 bus and connects to standard TV monitor fo. 
to almost any keyboard Characters are displayed as 16 lines 
r 32 character each, in a 7x9 dot matrix (64 character line requires a high resolution monitor 
or extensively modified receiver.) The character set includes 128 upper and lower case ASCII charac- 
ters and 64 graphics characters for plotting a 48x128 (or 64) grid. Characters are stored in the onboard 
memory and may lie accessed directly by the computer. 

S160 Kit S230 Assem and tested (Add S25 for 64 character option) delivery 30 days 
Analog Interface. This board is a complete interface for a CRT graphics display or an X-Y plotter, and 
provides 8 channels of software-controlled A/D conversion. There are 1 or 2 channels of analog 
with 10 bus resolution (0-1 Ov or t 5v out), 6-bit s of latched digital output, and 8 analog comparators 

1 channel IO-10v) S135 Kit S175 Assem. and tested 

2 channels (0-lOvl S185 Kit S235 Assem. and tested 

(Bipolar opt.on ( J 5v) add $8 for 1 ch ,$12 for 2) delivery 30 days 



All pri 



and specif icat ions subject to change without notice. Prices are USA only- Cal 



add 6% ! 



POLYMORPHIC SYSTEMS 



737 S. Kellogg, Goleta, CA 93017 



(805) 967-2351 



BankAmencard and Master Charge Accepted 



YTE'S 
UGS 



Here lies documentation of known bugs 
detected in previous editions of B YTE . . . 



"My Dear Aunt Sally," page 20, February 
BYTE: Two errors in our preparation of the 
flow diagram of figure 1 were detected by 
reader Tim Walsh, and confirmed by author 
Robert Grappel. 

Segment A (Main Routine): A "last 
character" test was omitted between node 6 
(the return point from routines in segments 
B through F) and the END box. The proper 
flow for the end of the main routine is: 



The following correction should be made 
to the specifications of the HP-10525T 
found in table I, page 24, December 1975 
BYTE, in Alex Burr's article "Logic Probes 
- Hardware Bug Chasers." The scale factor 
on the minimum pulse width specification 
was misprinted in the table and in note 
number 6 applying to the width specifica- 
tion. The HP-I0525T will respond to pulses 
as short as 10 ns (nanoseconds) guaranteed, 
typically as short as 5 ns in favorable circuit 
conditions. Pulses shorter than .05 seconds 
are stretched to .05 s. The printed version 
showed "ms" (milliseconds) which is only 6 
orders of magnitude larger than the actual 
specification printed by HP. 




( END \ 



BACK TO 
BEGIN 



J 



Segment B (Single Character Function 
Name Handler): The YES and NO labels on 
the conditional test "1 CHARACTER OP" 
were reversed. 



1K 475 ns 

STATIC RAM 

$4.25 for one 

$4.00 each for 

eight 



SIGNETICS 
2602-1 



all orders shipped 
postpaid and 
insured. Mass 
residents add 3% 
sales tax 



$3.75 
each for 32 

WHY PAY FOR BEING SMALL? 

Cenli-Byte is a new source of memory componenls 
and other necessary items for the computer hardware 
builder. Our function is to be a voice to the 
manufacturing companies representing you, the 
modest volume consumer of special purpose com- 
ponents. Cenli-Byte brings you this special intro- 
ductory offer of last memory chips, chips fast enough 
to run an MC6800 or 8080 at maximum speed. These 
2602-1 's arc new devices purchased in quantity and 
fully guaranteed to manufacturer's specifications. 

Centi-Byle works by concentrating your 
purchasing power into quantity buys of new 
components. Let us know what you need in the way 
of specialized components and subsystems for future 
offerings. With your purchasing power concentrated 
through us, together we will lower the cost of home 
computing. 



I 




PO BOX 3 1 2 
BELMONT, MASS. 02178 



Classified Ads Available for 
Individuals and Clubs 

Readers who have equipment, software or other 
items to buy, sell or swap should send in a clearly 
typed or printed notice to that effect. The notices 
are free of charge and will be printed one time only 
on a space available basis. Insertions should be 
limited to no more than 100 words. Notices can be 
accepted from individuals or bona fide computer 
users' clubs only. Commercial advertisers should 
contact Virginia Peschke at BYTE for the latest 
rate card and terms. 

PDP-11 wanted: Will trade 1000 copies of 
Computer Lib/Dream Machines for one standard 
PDP-11 minicomputer. Contact Ted Nelson at 
(312) 352-8796. 

FOR SALE: Tape drive, Wangco model 7, 12.5ips, 
7 track (change head only for 9 track) unused 
$500 each. Cassette drive, Computer Access 
Systems (MFE) model 250, 10-40ips (Altair 
compatible interface available from Cybertronics) 
new $250 each. Line printer, Tally model T-132, 
100 1pm, 132 column, 300, 600 or 1200 baud 
serial, well used $500 each. Core memory system, 
Ferroxcube (FX Systems) model FI-3C-4K12-22, 
4Kx12 bits, 1 sec, new $400 each. Write John L 
Marshall, Box 242, Renton WA 98055. 

Tired of waiting for MITS memory boards? I have 
two MITS 4 K Dynamic Memory Boards for sale at 
the kit price of $195 each. These boards were 
assembled by an electrical engineer and factory 
checked. All bits certified. H S Corbin, 11704 
Ibsen Dr, Rockville MD 20852, (301)881-7571. 

I will trade up to 1000 hours of programming and 
systems analysis for a complete system consisting 
of the following: An 8080-A based CPU with 64 K 
memory, dual drive floppy disk system, Qume 



74 



55 CPS printer, 9600 baud CRT with keyboard 
(upper and lower case ASCII and at least 12 lines 
of 80 characters, though 24 lines by 80 would be 
better). The system should be fully assembled, 
integrated, tested and with enough basic software 
(editor, assembler, IO drivers) to make it useful. I 
have been programming for over 14 years on 
systems large and small. Charles B Shipman Jr, 220 
Sandburg St, Dunn Loring VA 22027. 

SWTPC CT-1024, TV Typewriter Main and Memo- 
ry Boards completely wired. Recently tested by 
SWTPC. With instruction manual. $150 from Don 
Gould (313)566-6380 days. 

WANTED: Construction manual and data package 
for the Mark-8 Mini Computer. Appeared in Radio 
Electronics in August 1974. Reply to Robert L 
Gerald, PO Box 406, NY NY 10013. 

TVT for sale, works perfect! Displays 25 lines of 
40 chars each. With power supply and cabinet. 
Asking $175. Also have working boards (to attach 
to above unit) that accept serial ASCII and serial 
BAUDOT codes. Asking $35 each. High quality 
parallel ASCII keyboard, assembled and working, 
$40. R-E 4 Channel digital memory scope attach- 
ment — assembled but not tested, $150. You pay 
postage, prices negotiable, am willing to trade for 
some sort of ASCII printer. Jeff Roloff, 2214 
Brookshire Dr, Champaign IL 61820, 
(217)356-0780. 

FRIDEN FLEXOWRITER Model SPS. Consists of 
keyboard, printer, 8 level paper tape reader and 
punch. Good working condition with schematic. 
Contact Phil Hughes, PO Box 43, Richland WA 
99352. Phone: (509)942-7045 days, 
(509)946-7938 evenings. $500. 

CAELUS Model 303 Disk. I need to locate 
maintenance and repair manuals. Kurt T Rudahl, 
Box 6652, San Francisco CA 94101. 
(415)864-2263 

FOR SALE - ICP digital computer cassette decks. 
These OEM decks are complete and need only 
power supply and case and use TTL interface logic. 
May need some slight repair or adjustment. They 
are International Computer Products DigiDeck 
model 63 read/write decks with encoder board and 
2 track operation. $5 to ICP, Box 34484, Dallas 
TX 75234, can get a complete technical and 
maintenance manual. While my supply lasts I will 
sell these decks for $100 each. Send bank check or 
money order to Gary Fishkin, Deck, Box 349, 25 
Andrews Memorial Dr, Rochester NY 14623. 

FOR SALE: Intel SIM8-01 Microprocessor System 
includes 8008 CPU, TTY interface, IO connectors. 
Also 10 Intel 1702 PROMS, all never used; original 
cost $1500; first certified check or MO for $250 
takes all. M Siegel, 41 Middle Loop Rd, Staten 
Island NY 10308. 

Friden high speed PAPER TAPE PUNCH, new, in 
carton, no dust cover, $25! CARD READER, 
excellent condition, approximately 1 50 CPM, small 
simple unit, $35! Please include postage for either 
unit. Frank Smith, Box 386, Coburg OR 97401 . 

Monitor, Text Editor, and Assembler for an 8080 
available. Total memory requirement is 4 K bytes. 
I can also burn Intel 2708/8708 and 2704/8704 
PROMs for your system. Contact Albert Badu, 105 
Fairmont St, Arlington MA 021 74, (61 7)646-4539 
(evenings). 



ALTAI R 8800 

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75 




BOOK REVIEW 



An Introduction to Microcomputers, Adam 
Osborne & Associates, Inc, 2950 7th St, 
Berkeley CA 94710, (415) 548-2805, $7.50. 

This is an excellent book, useful for both 
neophytes and experienced electronics 
designers or programmers (I am the latter). 
It focuses on instruction sets possible and 
available, as well as external logic system 
considerations. About a third of this 406 
page book is devoted to detailed, objective 
examination of six microcomputers: the 
Fairchild F8, National PACE and SC/MP, 
Intel 8080, Motorola 6800, Rockwell PPS-8, 
and Signetics 2650. 

The first two chapters (16 pages) contain 
some computer history and background on 
binary arithmetic and logical operations. 
This is standard material, such as two's 
complement arithmetic, De Morgan's 
theorem, etc. The next chapter (22 pages) 
explains memory organization and address- 
ing, with differences between ROM and 
RAM usage mentioned. It also discusses how 
memory data is interpreted: as a binary or 
BCD number for single and multibyte opera- 
tions, as a character code, or as an instruc- 
tion code. 

Having covered the fundamentals, the 
next chapter (65 pages) is devoted to the 
generalized microcomputer itself — its archi- 
tecture, control, and timing. The various 
internal elements are described, such as 
accumulators, program counter, other 
specialized registers, the arithmetic/logic 
unit, and status flags. Throughout the book, 
many examples are used to clarify explana- 
tions; for example, two pages show the 
various ways overflow status is usually gen- 
erated. Next the basic fetch/execute CPU 
cycle is shown, with sample timing diagrams 
related to an illustrative chip pinout. This 
section is treating that mysterious boundary 



between hardware and software. Exactly 
how instructions are executed is treated in 
detail with 15 pages on the micro- 
programming of register transfer sequences. 

The last two generalized chapters delve 
further into system hardware (49 pp) and 
programming (106 pp). The hardware chap- 
ter starts with more on RAM and ROM 
interfacing, using some hypothetical bus 
systems. Most of this section deals with 
input/output operations. Interrupt proc- 
essing and direct memory access operations 
are discussed extensively. Frequent use is 
made of illustrative timing diagrams and chip 
interconnections; however, actual IO devices 
(displays, cassettes, etc.) are never men- 
tioned. A brief discussion of serial IO con- 
cludes the chapter. 

The programming chapter creates a hypo- 
thetical instruction set, explaining the 
rationale for various addressing modes and 
instruction operations. It starts with an 
introduction to programming and assembly 
language. One word of warning here: The 
authors view microcomputers more as 
replacing hard logic than as super cheap 
general purpose computers. They view 
"minicomputer" and "microcomputer" 
instruction sets in this light. However, 
hobbyists frequently are interested in 
running many different programs, and in 
ease of programming, which aren't impor- 
tant in systems implementing logic for indus- 
trial controls or washing machines. For 
example, many instruction sets assume the 
program resides in ROM, although hobbyist 
programs are more often in RAM. There are 
other, more subtle distinctions. Subroutine 
argument passing, and the ability to address 
memory based on full 16 bit pointers in 
registers or indirectly in RAM, are very 
important in general purpose systems. Still, 
this chapter is valuable when specific micro- 
computers are discussed. Common termi- 



76 




nology is established, and a coherent instruc- 
tion set organization makes comparisons 
much easier. I wish their sample instruction 
set was available in some microcomputer! 

Finally the reader arrives at the heart of 
the book - descriptions of the six micro- 
computers. Although so far only the PACE, 
8080 and 6800 have appeared as hobbyist 
kits, the others are worth looking at. The F8 
and 2650 both use very simple clocks and 
have an interesting organization. The PPS-8 



is probably least suitable as a hobbyist 
microcomputer, due to a strange and overly 
complicated instruction set. Some hobbyist 
chips are not covered; notably the MOS 
Technology 6502 and Intel 8008; but also 
such new chips as the 16 bit General 
Instrument CP1600 and Texas Instruments 
TMS9900, or the CMOS Intersil IM6100and 
RCACDP1801. 

Each microcomputer is outlined in the 
same way: features, registers, and flags; CPU 
pins and bus signals, accessory chips avail- 
able, interrupt and direct memory access 
methods, and a complete chart of instruc- 
tions in standard format. There is enough 
data to pick one best microcomputer for a 
given application, but manufacturer's litera- 
ture would be needed to actually build a 
system. A common benchmark program is 
implemented with each chip, although the 
authors wisely caution against using these as 
representative of efficiency, which varies 
greatly with the application and the assumed 
conditions. These sections give some feel for 
the programming philosophy of the chip 
designers, however. For choosing a micro- 
computer for your system, this book is an 
excellent place to start. ■ 

Bob Wallace 
PO Box 5415 
Seattle W A 98105 





















■ - 


reference card I 
for the 

int«J 

soso 

< ascii 

mnemonics > 

< notation 

flags > 

< conversions 

structure > 




Need an SOSO Reference Curd? This is the SOSO reference card which has been prepared by 
reader Don Mimlitch, 29 Hoy! St, Stamford CI '06905. It is available from Don for $1.25 each, 
or 5 for $5 as a special introductory offer. The sample card which Ed Crabtree photographed 
for us has proven quite useful in preparing articles with SOSO listings for BYTE, and it will no 
doubt become a valued addition to any 8080 user's documentation tools. 



77 



What's 

New? 




77 Microprocessor Learning Module: Here's a new item of considerable interest to readers 
desiring to learn the fundamentals of programming and microprogramming with a self 
contained battery operated processor which uses calculator packaging technology. The module 
and documentation come as a completely assembled ready to use package. 

Quoting the Texas Instruments press release, "A hobbyist, engineer or technician using this 
module about two hours a day could derive more than six weeks of concentrated self 
education." The price is $149.95 in single quantities. It was developed by a team of Tl 
microprocessor experts and members of the academic community to teach basic micropro- 
gramming and machine code concepts. The tutorial emphasis is on the difficult to grasp 
relationship between software and hardware. Contact Tl at the following address: 

Microprogrammer Modules 
Texas Instruments Inc 
Inquiry Answering Service 
PO Box 5012 
Mail Station 84 
Dallas TX 75222 



BASIC-8 Intelligent Terminal 

Mikra-D Corporation has announced a 
new system at an attractive price which 
many readers may wish to consider. This is 
the BASIC-8 Intelligent Terminal, designated 
MTS-8. The press release information on this 
machine describes a table top unit with 
keyboard, built in video display, a dual 
recorder audio cassette interface, and cabi- 
netry, delivered with software. Two versions 
of BASIC are available. With 8 K of memo- 
ry, a standard BASIC package is available; 
and with expansion to 12 K of memory, the 
system can handle an Extended BASIC. 

One unique feature is that it is one of the 
first "multimicroproccssor" systems avail- 
able in package form for the user. Its main 
processor is an 8080 device. This is the 
processor which runs the ROM operating 
system, the BASIC interpreter, and applica- 
tions programs. The second processor of the 



system is a floating point calculator chip 
which implements many of the special func- 
tions needed for the BASIC interpreter. By 
calculating the scientific and mathematical 
functions with a second processor, the soft- 
ware development time for the BASIC inter- 
preter was cut drastically, and the BASIC 
user can take advantage of full scientific 
notation employing 10 digits of precision 
and nearly 200 orders of magnitude for the 
exponent. 

The system's video display presents 24 
lines of 80 characters. The entire system 
weighs 35 pounds, sits neatly on the top of a 
desk, draws 100 watts at 110 VAC, and is 
available in kit form for $1695 in the 8 K 
BASIC version. The 12 K Extended BASIC 
version of the kit is available for a total price 
of $2230. Assembled and tested versions are 
also available. Contact Mikra-D at 770 Wash- 
ington St, Holliston MA 01746. 



78 



10 Strobes for the Altair SSOO 



Figure 1 shows a simple way to generate 
eight 10 strobes for an 8080 based micro- 
computer system. It uses only four inte- 
grated circuits and is shown with the MITS 
Altair signal names and connector pins 
for the input signals. When the SOUT signal 
is active high, the 7442 is steered to the 
lower o utpu t strobe codes (0, 1 , 2 and 3) 
and the PWR signal generates one of the out- 



ALTAIR 8800 
PIN MNEMONIC 



put strobes when it hits pin 1 2 of the 7442. 
For inputs, the SINP signal is active high and 
SOUT is low, so that the 7442 is steered to 
the higher input strobe codes (4, 5, 6 and 7). 
When the PDBIN signal hits pin 12 of the 
7442, an input strobe is generated. The 81 31 
integrated circuit is a comparator that is con- 
figured with six jumpers to select a group of 
four IO ports. Note that the selected four IO 
ports are contiguous and start at 0, 4, 8, C, 
10, etc. (Hex), depending upon the binary 
coding of the six 81 31 jumpers." 



John M Schulein 
1186 Arlington Ln 
San Jose CA 95129 




IS3l 

, S2 FOUR 
} INPUT 
»ISI STROBES 
isoj "U" 



COMPARATOR 



POWER CONNECTIONS 


IC 


+ 5V 


GND 


74L04 
74LIO 
7442 
8I3I 


14 
14 
16 
16 


7 
7 
8 
8 



Figure 1 : How to generate 
four Altair 8800 output 
strobes and four input 
strobes using four inte- 
grated circuits. 



Solid State Music Memory Products 

MB-1 Memory Board 

Mk-8 Board. Can be adapted to F-8, 6800, 
8080 & other systems. 86 pin connector 
req. 4Kx8 static, 1 microsec. 

PC Board only $22.00 

Complete Kit $109.00 

Edge Connector $3.00 

MB-2 Memory Board 

Altair 8800 compatible, address & wait on 
board DIP switches. 4 Kx8 static 1 usee 

PC Board $22.00 

Complete Kit $109.00 

10-1 I/O Universal Board 

8 bit parallel input & output ports, 
common address decoding jumped select- 
ed, one address for 8800 front panel sense 
switch, 40 uncommitted sockets, plug 
compatible with 8800. 

PC Board $22.00 

Complete Kit $42.00 



1 0-2 I/O Prom & Universal Board 
I/O for 8800, two port committed, pads 
for three more, other pads of UART, 
E ROM, etc. 

PC Board $22.00 

Complete Kit $47.00 

ICs at competitive prices (Please send for 
current price list) 

74XXX 74LXX 74SXX 74CXX 4XXX 
National 8XXX, MOS & Linears 
Signetics 8XXX, MOS & Linears 

Memory ICs 



2102s 


8 


64 


128 


1 us 
.65 us 
.5 us 


$16 
$18 
$20 


$112 
$128 
$144 


$192 
$224 
$256 



1702A EROMS $7.50 

Programming $5.00 

2101 $5.00 

821 2 $4.00 



Future Products 

8Kx8 Altair memory board 
Altair compatible mother board 
64 char per line video board 

80C97 $1 .50 

8T97 $2.40 

N8263 $4.50 

N8267 $2.00 

MM5262 $3.00 

5320 $4.00 

Check or money order only. Calif, 
residents 6% tax. All orders postpaid 
in US by UPS or 1st Class Mail. All 
devices tested prior to sale. Money 
back 30 day Guarantee. $10 min. 
order. Prices subject to change 
without notice. 

MIKOS 

419 Portofino Dr. 
San Carlos, Calif. 94070 

See: Proko San Luis Obispo, CA 



79 



w w 



\ % 









I 



Photo I: The mini wire wrap method can be applied with some success by virtually any experimenter without large capital in- 
vestment. Here is a sample assembly made from two Integrated circuits and some Vector P pattern unclad perforated board. For 
extra rigidity of the mounting, a spot of glue can be used to secure the IC. 

Save Money Using 

For real economy in packaging integrated 
circuits in home built breadboard designs, 
consider this method which I call mini wire 
wrap. By using the actual pins of the dual 
inline package (DIP) as wire wrap posts, 
connectors are eliminated and very high 
circuit density can be obtained. This tech- 
nique allows one of a kind projects to be 
quickly constructed with a minimum of 
material. The mini wire wrap method uses 
perforated phenolic or epoxy glass board. 
Integrated circuits can be mounted with the 
pins sticking up using mechanical fastening 
of the Vcc and ground pins soldered to bus 
wires on the opposite side of the board. (See 
figure 1 .) A small amount of glue can also be 
used if a stronger mounting is desired. 



Roger W Thompson 
5950 Valkei th 
Houston TX 77035 




Figure I: Mini Wire Wrap 
Construction. The inte- 
grated circuits are 
mounted without sockets, 
upside down on a per- 
forated board base. The 
mounting detail shows 
how the IC is attached by 
using a short jumper 
through the board. 



DIP INTEGRATED 
CIRCUIT 




V cc O^ ,Q) GND 

BU S ^-SOLDER-^ BUS 

MOUNTING DETAIL 
80 



Tool Construction 

A tool is required to wrap the wire 
around the IC pins. This can be constructed 
from a metal ball point pen cartridge. Cut 
the ball from the cartridge and flush the 
remaining ink with a solvent. As shown in 
figure 2, a small hole (0.030 inch, 0.762 
mm) is drilled through one side of the tube 
approximately 0.030 inch, 0.762 mm from 
the end. The end of the tube and the side 
hole must be deburred. The larger end of the 
tube (0.125 inch, 3.17 mm) can be chucked 



Photo 2: The reverse side of the assembly in photo 7 shows how two bus strips have been mounted. These strips have connec- 
tions through the board to the power and ground terminals of the ICs. Also shown in this sample assembly is the bypass capac- 
tor which is part of normal power distribution practices for logic families. 



Mini Wire Wrap 



in a tool handle such as those provided for 
small multipurpose screwdrivers. An unwrap 
tool can be fashioned from a small piece of 
hard vinyl tubing, or the tip of a thin lead 
mechanical pencil, with an inside diameter 
of approximately 0.030 inch, 0.762 mm. A 
notch cut in the end provides all that is 
necessary to loosen the wire on a previously 
wrapped pin. 

The hookup wire used should be ordinary 
computer wire wrap wire: 30 gauge solid 
wire with thin wall insulation. 

A wire stripper of the scissors type with 
an adjustment screw will provide satisfactory 
stripping operation. Adjust it so that few 
nicks occur. 

Operation 

To use, strip about 0.375 inch, 9.52 mm 
of insulation from a piece of wire and insert 
the wire in the wire wrap tool with the bare 
end sticking out of the side hole. Slip the 
tool, with wire inserted, over a DIP pin and 
twist the tool to wrap two or three turns 
around the pin. Care should be taken not to 
apply excess pressure since the \C pin can 
twist and break. Two wires can be connected 
to one pin to allow chained interconnec- 
tions. Leave a little slack in wires between 
integrated circuits so that replacement will 



be quicker, if it should become necessary. 
Generally speaking, integrated circuits are 
quite reliable. Unless an \C is misapplied 
(e.g., Vcc and Gnd reversed), replacement 
should be rare in small circuits (10 to 30). 
Since the DIPs are mounted upside down, it 
may be helpful to mark each DIP with its 
identity since the manufacturer normally 
marks the other side. 

I have used this technique successfully 
with TTL and CMOS digital ICs as well as 
linear types. No intermittents have been 
encountered in several years of use. Circuit 
density of four DIPs per cubic inch can be 
achieved, which is comparable to multi-layer 
printed circuit board packaging. After a 
circuit has been debugged, or if a bad 
connection is suspected, the wires can be 
optionally soldered to the pins with a very 
low wattage fine tip soldering iron. The mini 
wire wrap technique may not measure up to 
the rigorous standards of regular wire wrap, 
but it works and it may cut the cost of a 
project in half. ■ 



APPROX 
.040 ID 



-APPROX I in 



:«n:i 



f- 



030 DRILL 
(ONE SIDE ONLY) 



-METAL BALL POINT 
PEN CARTRIDGE 



Figure 2: Mini Wire Wrap 
Tool. One way to make a 
tool useful in this tech- 
nique is to recycle a metal 
ball point pen cartridge. 
Remove the point, flush 
out the residual ink with a 
solvent, then drill a small 
wire guide hole in the nar- 
row portion of the car- 
tridge. After deburring the 
holes, the tool can be 
mounted in a home made 
handle or the holder of an 
interchangeable blade 
screwdriver set. 



81 



A Perfect 



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Experienced 

For the 
Professional 



Balance ... 

in the World of 
Computers 




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INTERFACE — $1.50 per copy at your 
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if he doesn't have it, tell him to get it 




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Have you wanted to learn more 
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DEAR BYTE READER: 

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and a member of that rapidly growing community 
of people who are discovering home computing. 
ART CHILDS 
Editor - INTERFACE 



MEMBERSHIP FORM 

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INTEL 8080 CPU $37 50 

8008 8 BIT MICRO PROCESSING CHIP 
(with Data Book) $19 00 

2102-2 1024 BTRAM $ 2 95 

5202AUVPROM $1250 

MM5203UVPROM $12 50 

1702AUVPROM $12 50 

5204-4KPROM $24 95 



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MULTI-TURN TRIM POTS Similar to Bourns 
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F8 MICROPROCESSOR Kir 

WE'VE GOT THE F8 MICROPROCESSOR KIT. ONE 
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This Ihroe chip micropf OCMWM syslam has th« 

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1 ) Driven by 8 >', jn .i • 1 7 voJI power supply 

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3| 64 bytes o' lasi RAM scratchpad built into the 
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4) A built in clock generator and power on reset built 
into the CPU chip 

5) A programmable internal timer twill into the ROM chip 
6| 60*» o' the instructions are 1 byte 

7) TTL IO compatibility 

fll consumes less than 300mw ot power per chip 
9) A local interrupt with automatic adress vector 
10| expandable lo 64K byles (210? 2 slot memory 
T t in I" ft Kit has enough pans and instructions to demon- 
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We supply 
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365 1 A FAIR BUG programmed Storage 
unit provides the programmer with all 
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3853 Static memory interlace 
2102 2 

Phrs CMOS gates and buffers PC card. 
instruction manuals, programming 
guide and lime sharing guide 







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VERIPAX PC BOARD 

This board is a '/,,* single sided pa- 
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for powe r sup p ly connector 15.25 

MV5691 YELLOW-GREEN 
BIPOLAR LED 11.25 

MT-2 PHOTO TRANS $ .60 

RED. YELLOW. GREEN OR 
AMBER LARGE LED s lit .20 

14 PIN DIP SOCKETS .. * .35 

16 PIN DIP SOCKETS S .38 

MOLEXPINS 100/11.00 

1000/16. 00 

SPIN MINI DIPSOCKETS % ,3 

10P1NTO5TEF LON PCS O CKETS S .60 

10 WATT ZENERS 3 9, 4 7. 
12 18 OR 22V •■ J .60 

1 WATT ZENERS 4 7.5 6, 10. 12. 

15, 16QR22V M.I .25 



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5VDC AT 1A. 1 15VAC INPUT $24.95 

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1 103, 1024 bit RAM $2.75 

NEC 6003 2048 bil RAM $6.00 

1 101 2560il RAM $1.40 

7489 RAM $2.30 

7 POLE 1 THROW TO-5 MINATURE 

ROTARY SWITCH 

530V LOW CURRENT $1.15 



TRANSISTOR SPECIALS 

2N3585 NPN Si TO-66 S 95 

2N3772NPNSiTO-3 $180 

2N4901 PNPSiTO-3 S 85 

2N5086 PNP Si TO-92 . 4/$ 1 00 

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2N404 PNP GE TO-5 5/$ 100 

2N3919NPNSiTO-3RF $150 

MPSA13NPNSiTO-92 3r$100 

2N3767 NPN Si TO-66 $ 70 

2N2222NPNSiTO-18 5/$ 100 

2N3055NPNSiTO3 . .... I 80 

2N3904 NPN Si TO-92 5/$ 100 

2N3906 PNP Si TO-92 5$1 00 

2N5296NPNSiTO-220 $ 50 

2N6109PNPSiTO 220 .... $ 55 

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47UF 35V 5/S1 0(1 33UF 75V $ 40 

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1UF 35V 5/SI.00 I50UF 20V $.50 
4.7UF 35V 4/$t.00 

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C/MOS 
74C02- .26 
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NEWS FROM THE TRADE: 
MITS, POLYMORPHIC 

MITS has outgrown its facilities again and 
has moved to larger quarters. Their new 
address is 2450 Alamo SE, Albuquerque NM 
87106. The Altair convention is reported 
coming along extremely well, with thou- 
sands of people planning to attend. The 
dates are March 27 and 28 and late 
registrations may be made by calling Barbara 
SimmsatMITS,(505) 262-1951. 

Polymorphic Systems has also outgrown 
its old facility and has moved to 737 So 
Kellogg, Goleta CA 93017 (mailing address: 
PO Box 2207, Goleta CA 93018). Richard 
Peterson reports that their video board is 
doing well and they have just come out with 




a small two board, Altair compatible 
microprocessor (see ad page 73). 

The Micro-Altair, shown here, uses an 
8080 chip and Altair-compatible backplane. 
The standard configuration includes a CPU 
board with 512 bytes RAM, operating 
system ROM and space for more ROM, 
video interface board, backplane with power 
supply and the cabinetry shown. Price of the 
system is $582 with a special introductory 
offer of $475 through the Ides of March 
(March 15 1976). 



WARNING: Our Hardware 
Assemblers are DANGEROUS! 



NEW fromCELDAT: 



You can get hooked on the graphics display card by Jim Hogenson 
(Oct. BYTE), for example - it is so much fun that this user produced: 




Or take the 4x8 memory matrix card — with this it is so easy and 
inexpensive to add static RAM to your custom system that you'll want 

more, and more and more. And with our prototyping card those 

subassemblies wire up in a snap - our card offers the most area for the 
price of any predrilled board now sold. 

Check us out today — and watch for some exciting new products soon 
to be released - but beware: it COULD be habit-forming! 

CELDAT DESIGN ASSOCIATES 

P.O. Box 752 
Amherst, N. H. 03031 



Do you: 

- need blueprint copies of originals which 
are crisp and clear? 

- want to try making your own P.C. boards? 

- want sepias, pressure-sensitive labels, etc.? 

BUT - don't want to spend the $300, $500, 
$1000 and up for a big copier (and the 
motorized ones won't do those P.C. cards 
anyway ) 

AT LAST there is a copier for YOU - the 
COPYDAT I and COPYDAT II. Oh, they 
are just a bit slower than the big machines 
(copies take 1-1/2 to 2-1/2 minutes from 
start to finish) - but you can't beat the 
price and it doesn't take up your whole 
office or lab. 

The most amazing thing about the 
COPY DATs is the print quality. We used a 
very detailed engine drawing for a demon- 
stration - and the COPYDAT print faith- 
fully reproduced every line and shading and 
was the equal of an expensive professional 
copy. (That engineer, incidentally, now uses 
a COPYDAT.) 



The 

C 

o 
p 
y 

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A 
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are 
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Copydat I 



$149.95 

for prints up to B size (12" x 18") plus freight 

Copydat II $199.95 

for prints up to D size (24" x 36") plus freight 

Developing tube for I and 1 1 - $20.00 plus freight 

We supply paper, etc., too. Write today for details! Would you like a 
sample copy of your most difficult print? Send it along — or just 
write for a copy of that engine drawing and we'll rush one off ASAP. 



84 



S€S€ lOFf WARE BOARD 

IMAltair 8800 and I MSA I PLUG-IN COMPATIBLE. tffGivES you editor, assembler, and monitor routines in 

A MEMORY THAT DOESN'T FORGET ~ THANKS TO OUR PRE-PROGRAMMED EROMs. ttfALLOWS for change: because this 
IS EROM RATHER THAN MASK, CHANGES CAN BE MADE AT WILL IN THE SOFTWARE. ,, THE BOARD DOESN'T BECOME OBSO- 
LETE AS YOUR SYSTEM GOES THROUGH CHANGES, ttfTHE COST IS $159.95 FOR THE BOARD, PARTS, SOCKETS FOR ALL 
ICS, REGULATORS, SOURCE LISTING, INSTRUCTIONS, ETC. JttALSO: SOURCE LISTING ALONE AVAILABLE FOR $2.95, 





BILL GODBOUT ELECTRONICS 
BOX 2355, OAKLAND AIRPORT, CA 94614 

CHERRY Switches 
and Keytops 




VOU UAV PLACE MASTERCHARGE® OR BAWKAMERICARD® ORDERS BV CALLING, 24 HOURS A VAV, 

(415) 357-7007 

TERMS: AVV 50$ TO ORDERS UWPER $10. AW SHIPPING WHERE INDICATED; OTHERWISE, 
ITEMS SHIPPED POSTPAW. CAL RES ADD TAX. WO COD— IT'S TOO MUCH PAPERWORK/ 

switches 10000 uF at 10V! 

4 FOR $1.00 si 25 
SPST * * 

MOMENTARY fr 



The perfect tonic for power 
supplies with a farad defi- 
CIENCY. Axial lead package 



Cherry Stock 

Number 

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THE LIST PRICE OF THESE I2UALITY DATA 
ENTRY SWITCHES IS *1.BS EACH---BUT OUR 
PRICE: S/*l-OD {WITHOUT KEYTOPS}. IF 
YOU'D LIKE SWITCHES WITH KEYTOPS-, THE 
PRICE IS S/*l-aSi BUT WE ONLY HAVE A 
LIMITED NUF1BER OF KEYTOPS, AND CANNOT 
GIVE CHOICE OF LEGEND. HOWEVER-, THIS 
SWITCH IS COMPATIBLE WITH MANY COMMER- 
CIALLY AVAILABLE KEYTOPS. HERE'S YOUR 
CHANCE TO STOCK UP ON SOME SMOOTH AND 
RELIABLE SPST PUSHBUTTON SWITCHES AT A 
SUPER SPECIAL PRICE. 





39jjf tantalums 
for bypassing 



4for$1.00 



\J 



NAKED RAM 
4k x 8 $7995 

This general purpose board is designed specifi- 
cally FOR JOLT SYSTEMS, BUT IS EQUALLY APPLICA- 
BLE TO OTHER BI-DIRECTIONAL BUSS SYSTEMS. If 
YOU DON'T NEED THE ON BOARD REGULATION OR BUF- 
FERS OF OUR "BIGGER BROTHER" 4K X 8 BOARD, THEN 
THIS IS THE WAY TO IMPLEMENT COST-EFFECTIVE 

MEMORY, LOW POWER UNDER 750 MA. SAME SIZE 

AS JOLT RAM CARDj WITH INSTRUCTIONS, 



91L02 

Low Power 

NMOS static 

IK RAMS 

WHILE THEY 
LAST! 

SPECIAL! 

$2.35 



5 VOLTS— 5 AMPS 
+12 VOLTS— \ AMP 
-12 VOLTS — % AMP 

--AND ONE ADJUSTABLE 
NEGATIVE BIAS SUPPLY 



Ideal for systems built around 8008, 8080, PACE, 

6800, 6502 and other CPUs with enough left over to 

power up to 16K bytes of RAM. Same size as JOLT sup- 
ply. Just about goof proof, too; includes crowbar 
overvoltage protection on +5V & FOLDBACK current limit- 
ing regulation on the 5 volt supply is guaranteed 

better than 1% with line and load variations . A TOP 

QUALITY COMPUTER SUPPLY. .. INCLUDES CHASSIS AND ALL 

HARDWARE, but less line cord. For 117 VAC, 60 Hz. 

PLEASE ADD SHIPPING FOR 8 LBS. 



micro- 
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2 


:^ 


;, %I 








*""~" 


1 


Tho 


■ . t » 


The t/i 




Transistor 


■ 


■TTL ■§ 




and Diode 


i.~te: 


■Data w 


■ 1 


Data Book 


Data 


.Book ^ 




















H 








o 

ST 
CO 

I 


p 




fc : 










You'll Want to Nybble 
at these Byte Books 

Where does the editor of a computer magazine turn to when he must 
verify some author's hardware design? Information on a 75450 
interface gate, or a 74147 priority encoder circuit does not spring forth 
by magic. Checking the information supplied by authors is part of 
BYTE's quality control program. 
When you build a project, you need this same sort of information. All you find in the advertisements for parts are 
mysterious numbers identifying the little beasties . . . hardly the sort of information which can be used to design a 
custom logic circuit. You can find out about many of the numbers by using the information found in these books. No 
laboratory bench is complete without an accompanying library shelf filled with references - and this set of Texas 
Instruments engineering manuals plus Don Lancaster's TTL Cookbook will provide an excellent starting point or 
addition to your personal library. 



• The TTL Cookbook by Don Lancaster, published by Howard 
W. Sams, Indianapolis, Indiana. Start your quest for data here with 
Don's tutorial explanations of what makes a TTL logic design tick 
335 pages, $8.95 postpaid. 

• The TTL Data Book for Design Engineers, by Texas 
Instruments Incorporated. How does an engineer find out about 
the TTL circuits? He reads the manufacturer's literature. This 640 
page beauty covers the detailed specs of most of the 7400 series 
TTL logic devices. No experimenter working with TTL has a 
complete library without The TTL Data Book for Design 
Engineers. Order yours today, only $3.95 postpaid. 

• The Supplement to The TTL Data Book for Design Engi- 
neers, by Texas Instruments Incorporated. What happens when 
you can't find a 7400 series device listed in The Data Book for 
Design Engineers? Before you start screaming and tearing your 
hair out in frustration, turn to the Supplement. The Supplement 
has 400 pages of additional information including a comprehensive 
index to both TTL Data Book volumes. To be complete (and keep 
your hair in place and vocal cords intact) you'd best order the 
supplemental $1.95 to accompany the main volume. 

• The Linear and Interface Circuits Data Book for Design 
Engineers, by Texas Instruments Incorporated. When you run 
across one of those weird numbers like 75365 the immediate 
frustration problem occurs again. What kind of gate could that be? 
We won't tell in this ad, but you can find out by reading the 
specifications in The Linear and Interface Circuits Data Book for 
Design Engineers. You can interface your brain to the 72xxx 
(linear) and 75xxx (interface) series of functions by ordering your 
copy of this 688 page manual at only $3.95 postpaid. 

• The Semiconductor Memory Data Book for Design Engi- 
neers, by Texas Instruments, Incorporated. Don't forget the 
importance of memories to your systems. Refer to this 272 page 
manual to find out about the T.I. versions of many of the popular 
random access memories and read only memories. Order your 
personal copy today, only $2.95 postpaid. 



• The Transistor and Diode Data Book for Design Engineers, 

by Texas Instruments, Incorporated. You'd expect a big fat data 
book and a wide line of diodes and transistors from a company 
which has been around from the start of semiconductors. Well, its 
available in the form of this 1248 page manual from T.I. which 
describes the characteristics of over 800 types of transistors and 
over 500 types of silicon diodes. This book covers the T.I. line of 
low power semiconductors (1 Watt or less). You won't find every 
type of transistor or diode in existence here, but you'll find most 
of the numbers used in switching and amplifying circuits. Order 
your copy today, only $4.95 postpaid. 

• The Power Semiconductor Handbook for Design Engineers by 

Texas Instruments, Incorporated. To complement the low power 
transistor handbook, T.I. supplies this 800 page tome on high 
power transistors and related switching devices. Here is where you 
find data on the brute force monsters which are used to control 
many Watts electronically. Fill out your library with this book, 
available for only $3.95 postpaid. 

• Understanding Solid State Electronics by Texas Instruments, 
Incorporated. This is an excellent tutorial introduction to the 
subject of transistor and diode circuitry. The book was created for 
the reader who wants or needs to understand electronics, but can't 
devote years to the study. This 242 page softbound book is a must 
addition to the beginner's library at only $2.95. 

• The Optoelectronics Data Book for Design Engineers by 

Texas Instruments, Incorporated. This 366 page book is a 
compendium of information on T.I. phototransistors, LEDs and 
related devices. Order yours at $2.95 postpaid. 

Buyers of these books should be cautioned: heavy reading will be required. These 
books are so filled with information that they weigh in at a total of about 190 
ounces (5387 grams). On the basis of sheer mass, these books have got to be the 
bargain of the century. Make sure that you use a structurally sound book shelf and 
above all avoid dropping one of these books on your foot. But the mass of these 
books doesn't affect the bargain: we pay postage on all orders shipped to addresses 
in the USA and Canada, so the prices you see are the prices you pay. (That's only 
$.005 per gram on the average.) 



.TTL Cookbook <g> $8.95 

.TTL Data Book @ $3.95 

. Supplement to TTL Data Book @ $1.95 

. Linear and Interface Circuits @ $3.95 

.Semiconductor Memory Data @ $2.95 

. Transistor and Diode Data Book @ $4.95 

. Understanding Solid State Electronics @ $2.95 

.Optoelectronics Data Book @ $2.95 

. Power Semiconductor Handbook @ $3.95 



Send to: Name 



Address 



City 



State 



Zip 



BITE 



□ Check enclosed 

□ Bill MC# 

□ Bill BA# 



Exp. Date. 
.Exp. Date. 



PETERBOROUGH, NH 03458 



Signature 



Feel free to photocopy this or any other page if you wish to keep your BYTE intact. 

86 




SYSTEM 21 DATA MANAGEMENT STATION 

VIATRON'S System 21 is a family of data processing devices designed for data management, including data entry, control, 
display, communication, storage and retrieval. With its modular structure, System 21 can be configured to perform a wide 
variety of data processing operations. 

A typical System 21 configuration includes a Microprocessor, two Tape Channels, a Keyboard, two Data Channels, and a 
Video Display. Central to the System 21 structure is the Microprocessor which contains hard-wired microprograms that 
perform a fixed set of logical operations. The hard-wired microprograms in the Microprocessor accomplish the same 
functions as a general-purpose computer operating system or assembler. Because the microprograms are hard-wired, 
however, there is no need for extensive programming. 

There are two modes of system operation— manual control and program control. In the manual mode of operation, the 
operator initiates all Microprocessor functions. Under program control the Microprocessor performs certain functions 
automatically through the use of a control program. 

The Microprocessor has four input/output channels, two Tape Channels and two Data Channels. The Tape Channels are 
devoted to either VIATAPE Recorders or Computer Tape Recorders, one recorder per channel. The two Data Channels 
can communicate with optional input/output devices. They can be connected, for example, to a Model 6001 Card 
Reader/Punch Adapter for reading and punching cards, or to a Model 6002 Printing Robot for providing hard copy. The 
Data Channels can also be interfaced with a Model 6003, 6004, or 6005 Communication Adapter for providing a link with 
another System 21 Data Management Station, a computer, or virtually any other device capable of USASCII interface. The 
Keyboard has its own Channel dedicated to providing data input and control to the Microprocessor. 

Unused, packed in 4 cartons. System consists of video display, power supply, microprocessor, two cassette tape decks 
mounted in microprocessor panel, keyboard, all as pictured. Sold "as is." Due to 4 years of storage, may require some 
adjusting/cleaning. With instruction book. Shipment within 24 hours if paid by MC, BA, or certified check. Sold FOB 
Lynn Mass. 



sWe&nMci. 



$ 425°° 



MESHNA P0 Bx 62 E. Lynn Mass. 01904 



87 



ATTENTION All Ye Alice Freaks and Other Lovers of Logical Systems. Here is 
documented evidence that Lewis Carroll would have read BYTE had he lived in 
1976: 



JABBERWOCKY. 



'Twas brillig, and the slithy toves 
Did gyre and gimble in the wabe ; 

All mimsy were the borogoves, 
And the mo me raths outgrabe. 

"Beware the Jabberwock, my son! 

The jaws that BYTE, the claws that catch! 
Beware the Jubjub bird, and shun 

The frumious Bandersnatch!" 

He took his vorpal sword in hand: 

Long time the manxome foe he sought— 

So rested he by the Tumtum tree, 
And stood awhile in thought. 



And as in uffish thought he stood, 
The Jabberwock, with eyes of flame, 

Came whiffling through the tulgey wood, 
And burbled as it came! 

One, two! One, two! And through and through 
The vorpal blade went snicker-snack! 

He left it dead, and with its head 
He went galumphing back. 

"And hast thou slain the Jabberwock? 

Come to my arms, my beamish boy! 
frabjous day! Callooh! Callay!" 

He chortled in his joy. 

'Twas brillig, and the slithy toves 
Did gyre and gimble in the wabe; 
All mimsy were the borogoves, 
And the mome raths outgrabe. 



Don't miss out on all the fun and high quality information which is found in 
every issue of BYTE. Subscribe today. Join the tea party and have a BYTE to eat. 




If the subscription card is missing from your issue, use the coupons below. 



Name . . 
Address 
City . . 



. State. 



Zip. 



□BILL ME DCheck for $12 enclosed 

□ Bill BankAmericard or MasterCharge # 



Name . . 
Address 



City 



State. 



Zip. 



□BILL ME □ Check for $12 enclosed 

□ Bill BankAmericard or MasterCharge # 



• BYTE • 70 Main St • Peterborough NH 03458 

Allow six weeks for processing. 



88 



m CRYSTALS! BEL 



Part a 
CY1A 

CY2A 
CY3A 

CY7A 

CY12A 
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CY30B 



Frequency 
1 (300 UH/ 

? 000 MHz 
■1 000 MHz 
5 000 MHz 
10 000 MHz 
18 000 MHz 
20.000 MHz 
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Case Style 
HC33VU 

HC33W 
HCJB/U 
HCIB-'U 

HCiau 
Hcia.'U 

HC18.IJ 
HC18/U 



54 95 
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CLOCK CASES 

Nicely styled casBs complete with red 
bezel lor use in such applications as 
desk clocks, car clocks, alarm clocks, 
instrument cases 

DIMENSIONS W-4". I Vh" . H-2" 
S5.95 



64 

Key 

Keyboard 

S24.95 



Tliis keyboard is composed ol h-\ Msgneiic Reed Switches, in or 
iniencorted Willi each SPST switch hroiighl out to two pins 



HD01G5 Keyboard Encoder RDM 



DIGITAL WATCH READOUT 



MOS LSI DEVICES 

CLOCK CHIPS 

MM5309 6 Digit. BCD Outputs. Reset PIN. 

MM5311 6 Digil, BCD Outputs, 12 or 24 Hour 

MM5312 4 Digit. BCD Outputs, 1 PPS Otitpul 

MM5313 6 Diqil, BCD Outputs, 1PPS Output 

MM5314 6 Digit. 12 or 24 Hour. 50 or 60 Hz 

MM5316 4 Digit. Alarm. 1PPS Output 

MM53I3 Video Clock Chip, For Use Will MM5841 

CT7001 6 Digit. Calander. Alarm. 12 or 24 Hour 

CALCULATOR CHIPS 

MM5725 6 Digit. Four Function, Less Decimal 

MM5738 8 Digit, 5 Function; -. .«.*.% 

MM5739 3 Dicit. 4 Funciion, Floating Decimal 

CT5001 12 digit 4 Function 

CT5O05 12 digit 4 Funciion wilh Memory 

CI5030 12 digit 4 Function antfi 

MISC. MOS 

MK50C 7 Complete 4 Digil Counter 

L0110/LD111 3ft Digital Voltmeter Cbip Set 

MC1408L7 7 fill Digital To Analog Conv 

MM5320 (V Camera Sync Generator 

MM5841 Video Generator For MM5318 



S10 95 
S25.00 

9.95 



DL728 

The DL728 is a dual 5" common cathode red 
display. II is ideal tor use wilti clock chips, as 
segments arc already multiplexed. S2.95 




1'/«"xlK" XFMERS 

Thai were designed tor clock type ap- 
plications 110 Vac primary @ 60 Hz 
Secondaries 8- - o Vac @ 

30 mA-50 mA 
50 Vac @ 30 mA-50 mA 

f ' :ellent tor mimanm; powu: supplies 
& gas discharge displays 



P.C. Mount 



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1/16 VECTOR BOARD 

0.1" Hole Spacing P-Pattern Price 

Part No. Length Wideth 1-19 20-49 



EPOXY GLASS 
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64PJ4 052XXXP 
169P44 02XXXP 
64P44 062 
S4P44 062 
169P44 062 
169P84 062 
169P44 062C1 



VECTOR WIRING PENCIL 




3tr 



Vector Wiring Pencil Pi 73 consists ol a hand held leatherwemht (under one 
ouncel too! which is used to guide ano wrap insulated wire, ted off a 
sell- contained replaceable bobbin, onto component leads or terminals instal- 
led on pre-punched "P" Pattern Veclorbord-. Connections between the 
wrapped wire and component leads, pads or terminals are made by soldering. 
Complete with 250 FT ol red wire. 



Special $7.95 



REPLACEMENT WIRE — BOBBINS FOR WIRING PENCIL 

W36-3-A-Pkg. 3 250 It. 36 AWG GREEN S2.40 

W36-3-B-Pkg. 3 250 It. 36 AWG RED S2.40 

W36-3-C-Pkg. 3 250 ft. 36 AWG CLEAR S210 

W36-3-D-Pkg. 3 250 It 36 AWG BLUE $2.40 



9V BATTERY CLIP 

STANDARD CLIP 
FOR USE WITH 9V 
TRANSISTOR BATTERIES 
WITH 4" LEADS 



~~~f ra *ir' * ** 



9/. 99 



TERMINAL STRIPS 

THREE TERMINAL 
STRIPS, WITH CENTER 
TERMINAL USED FOR MOUNTING 



dFU 



15/S1.00 



MOLEX PINS 

PINS USED AS INEXPENSIVE 
SUBSTITUTE FOR SOCKETS 
SPECIAL 100/1.49 

SPECIAL 1000/12.00 



IICROPROCESSOR COMPONENTS 



8080 
S24.95 



Direct Replacement 
For Intel C8080 



CENTRAL PROCESSOR UNITS 

Each processor Feature a 2/is instruction cycle, and arc brant) 
newfromthemaiiiilacturer The 8080 is BZraf generation 
arocessp; and the 308OA is a 2V? generation microprocessor 






808QA 
S39.95 



Direct Replacement 
For Intel C8Q80A 



t ////// ///' 



2519 
2524 
2525 
2527 
2529 
2532 
2533 



AY-5-101 

2513 



Super ROOF 

SB'S 

1024 DYNAMIC 
HEX 32 BIT 
HEX 40 BIT 
512 DYNAMIC 
1024 DYNAMIC 
DUAL 256 fill 
DUAL 512 BIT 
QUAD 80 BIT 
1024 STAT'C 
FIFO 
16X4 REG 

UAHT S 
20K BAUD 

ROM'S 
CHAR GEN 
RANDOM BTS 



8101 

am 

8589 
91L02 
74200 

93410 
5262 

I702A 
5203 
82S23 
82S123 



256X1 
1024X1 
4096X1 
256X4 



256X1 
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2048 
32X8 
32X8 



STATIC S2 25 

DYNAMIC 2.95 

STATIC 6 95 

STATIC 2 49 

DYNAMIC 19.95 

STATIC 7 95 

MNOS 29 95 

STATIC 2J9 

STATIC 7 95 

STATIC 7 95 

STATIC 349 

STATIC 2 75 

STATIC 6 95 

STATIC 1 75 

DYNAMIC 2 95 

FAMOS 15 95 

FAMOS 14 95 

OPEN C 5 00 

TRISTATE 5.00 



MM5262 Fully decoded 2Kx1 dyiiamn 
time, and requires a - 5, +8.5. and 



2K RAM SPECIAL 

RAM All inputs except clacks aie TTL compatible. Provides a 635 n s minimum access 
- 15V power supply Low power pravidas non volatile memory using battery back up 
50.99 ea (0.05 cents per bit) 



BUILD YOUR OWN JOLT MICROCOMPUTER IN JUST 3 HOURS 
OR LESS FOR S1 59.95. 
A COMPLETE MICROCOMPUTER IN A SINGLE CPU KIT INCLUDES: • An MOS 
Technology MCS6502 NMOS microprocessor • 512 bytes of program RAM, and 64 
byles of interrupt vector RAM • 1K bytes of mask programmed ROM containing 
DEMON, a powerful debug monitor • 26 programmable I/O lines • Internal RC clock, or 
crystal controlled clock with user supplied crystal • Serial I/O ports for use with a tele- 
printer current loop drive/receiver, or an EIA standard driver/receiver * Expandable ad- 
dress and data buses • Hardware interrupt • Control panel interface lines available on 
card connector • Complete assembly manuals and sample programs 




JE SERIES KITS 



JE700 clock 




trie JE700 is a low cosl digital clock Bui 
is a very hinli quality unit The unil tea- 
lures a simulated walnut case Willi di- 
mensions ol 6 x?\> i i ii utilizes. a 
MAN72 hiqti brightness re.idour ano ":e 
Ml/5314 clock chip 



115 VAC— 

$17.95 



JOLT ACCESSORY KITS 



JOLT RAM Card — Fully static 4.096 bytes til RAM wild 
1 microsecond access time nncf on-bonrd decoding 
S1 99.95 

JOLT I/O Card (Peripheral Interlace Adapter) — 2 PIA 
LSI ctiips. 32 l.'O lines, (our interrupt lines, on-board de- 
coding and standard TTL drive Fully programmable 
S95.50 

JOLT Power Supply - Operates at - 5, ■ 12 and 10 
voltages Supports JOLT CPU. 4K bytes ot HAM and 
JOLT I O card — or. CPU and 3 I O cards S99.95 
JOLT +5V Booster Option Fits onto JOLT Power 
Supply card. Supports CPU. fiK bytes RAM arid 8 1.0 
CPU and cards. S24.95 



JOLT Universal Card —Same size |4>'a * T ), same 
lorm factor as older JOLT cards. Comiiletely blank. 
drilled to accent 14, 16. 24 or 40 pin socktits S24.95 
JOLT Accessory Bag Coninms enouijh hardware to 
connect one JOLT card to another, tiat cable, connec- 
tors, card spacers, hardware QIC S39.95 
JOLT Resident Assembler Fully symbolic, single 
nass resident assembler, all mnemonics compatible wild 
timesharing assemblers Delivered on lo<ir 1702A 
RROMs, reaay tor plugging mio JOLT PROM card 
S149.95 

JOLT 1702A PROM Card Sockets tor 2.048 byles of 
PROM ii lemoiy I 'Liu; , _ n ly.vi ;ui ' ■ in memory with jumper 
selectable addresses S99.95 



AWG 

30 AWG 
30 AWG 
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30 AWG 



COLOR 

WHITE 

YELLOW 

RED 

GREEN 

BLUE 

BUCK 



30 AWG WIRE WRAP WIRE 

25 FT. MIN. 50 FT. 



1000 FT. 
S24 00 

24 00 



26 AWG RIBBON CABLE 

10-24 It 



6' 2 CONDUCTOR POWER 
CORDS 125V @ 5A 



Sr 



3/1$ 



Ss= 



sTHREE CONDUCTOR POWER SUPPLY CORDS 



1723? 
1723B 
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18141 



35) 



18(41X341 
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RATING 


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1250W 


BLACK Special .70 ea 


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1250W 


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1250W 


GHEY 1 30 


IDA- 125V 




1250W 


BLACK 59 


10A-125V 





JE803 PROBE 



• -^, §3. 



$9.95 Per Kit 

printed circuit board 




JOYSTICK 

These joysticks feature (our 
100K potentiometers, that vary 
resistance proportional to the 
angle ol the stick. Sturdy metal 
construction with plastics 
components only at the mova- 
ble joint. Perleci for electronic 
games and instrumentation. 

S9.95eo 



ELECTRONIC CRAPS 



w m 




Electronic craps is an en- 
tirely electronic game 
featuring a dice "roll 
down". 14 LED's form 
two dice that roll when ac- 
tivated by a ush ootton 
Dimensions are 6Vi" x 



' W, 



S19.95 



ELECTRONIC ROULETTE 




His kit comes complete with all 
iiiponents, including the case and 
<; cord. Electronic Roulette, is en- 
Sly electronic, and features 32 
D's that form a wheel, that is acti- 
■ed, by a push Liotton switch. Di- 
msions are 6V2" x 6V x 1V>". 
S29.95 



Semiconductor Specials 



[typically 250 MH, 

JJ3055 - Same as T03 CAW 2N3055 except that base and e ' 

i iiij!; 

11J4308 - Excellent signal dirjtle lor usei in rjigitat switching circuit: 

MCT2E - NPN Opt!) Isolator which provides 2J0Q VDC isolation. 



7/S1.00 

tter I earls have solder 



W123 - NPN Si, high In; ni... nicy w.'iicMiiii; ransistor Will 

deally suited for most digital applications 

RL4403 - Red .?." LED with 2 piece plastic mounting 



n HFF 



■ 16 PIN uackage Ideal lor s< 



Continental Specialties 



Satisfaction Guaranteed. $5.00 Min. Order. U.S. Funds. 

California Residents — Add 6% Sales Tax — Data Sheets 25c each 

Send a 13c Stamp (postage) for a FREE 1976 Catalog 

OrfTttSS 

*F>.0. BOX 822, BELMONT, CA. 94002 
PHONE ORDERS — (415) 592-8097 




$15.95 



PROTO BOARD 6 



C"'n,nn'i(-n!s ire made witn com- 
mon #22 AWG hook-up wire This 
quality O'eaoooardnrj kit mlurjes 
630 co^rjonent tie points at less 
tnan2 5ceacn It measures 6 long 
by 4 wide Designer: specially to 
SreaflDo?."; Microprocessor Cir- 



PROTO BOARD 1D0 

A low cosl, bid 10 IC capacity 
breadboard kil with all the quality ol 
OT sockets and the best ot ihe Proto 
Board series complete down to 
Ihe last nut bolt and screw In- 
cludes 2 OT-35S Sockets: 1 QT-35B 
Bus Strip. 2 5-way binding posts 4 
nibber teet. screws, nuts, bolls, and 
easy assembly mslurclmns. 

SPECIAL S17. 95 



FEATURE 




Clubs and Newsletters 




Mike and Key Amateur Radio Club 

The Mike and Key Radio Club, Seattle 
WA, has had information and activities 
related to microprocessors. The March 6 
meeting included demonstrations of systems 
by four members using various Teletype 
models and CRT terminals. For more infor- 
mation, contact Bill Balzarini, K7MWC, at 
RO-2-7738. 



Chess Interest? 



S Moreland, 
6) 921-1 103, 



P Summervillc, 2822 
Apt 3, Cleveland OH 44120 (2 
is interested in correspondence with other 
individuals engaged in activities related to 
programming of Chess automatons. 

Little Rock Club Activities? 

David W Davis, Rt 7 Box 5068-10, 
Benton AR, is interested in starling a club in 
the Lillle Rock area. David wants to meet 
other individuals with similar interests 
(microcomputers and amateur radio) and 
would like to share equipment and expe- 
riences. 

St Petersburg FL Club Activity? 

Allen Swann, 2510 Oak Trail S, Clearwa- 
ter FL 33516, wants to help get a computer 
club started in the St Petersburg area. He can 
be reached by phone at (813)535-4194. 

The Micro-8 Computer User Group 
Newsletter 

Hal Singer and John Craig continue to 
put out an excellent compendium of reader 
supplied information in the Micro-8 news- 
letter. As April BYTE goes to press in late 
January, we received the Volume 2 Number 
I issue. Hal and John have one of the oldest 
hobbyist newsletters with a Hue micro- 
computer orientation, started soon after the 
landmark 1974 article in Radio Electronics 
which described an 8008 processor available 
in an extremely economical format, the 
Mark 8. 



The format of the Micro-8 is largely 
oriented to making available copies of cam- 
era ready materials sent in by readers and 
friends. The current issue (dated January 
11), for instance, includes some notes by 
John Craig, letters from users of various 
systems, names and addresses of individuals 
interested in contacting others, frank com- 
ments about gripes and grievances, technical 
comments, diagrams and programs for vari- 
ous systems, etc. You'll find out best about 
what's in it by subscribing to this pioneer 
newsletter, at $6 for 6 issues. Back issue sets 
arc also available: Volume 1, I through 4, is 
$3.50; Volume I, 5 through 12, is $6. Send 
to: 

Micro-8 Computer User Group 

Newsletter 

John Craig and Hal Singer, Editors 

Cabrillo Computer Center 

4350 Constellation Rd 

Lompoc CA 93436 

Tallahassee Amateur Computer Society 

BYTE received a copy of the Tallahassee 
Amateur Computer Society Newsletter, 
Volume 1 Number (December 1975). This 
was a one sheet preliminary edition of the 
TACS Newsletter. TACS is a group of people 
interested in computers as a hobby. Meetings 
are biweekly on Saturdays from 2:00 to 
5:00 PM. Anyone with an interest or infor- 
mation to contribute in areas of hardware, 
software and applications of these wonderful 
machines is urged to attend. 

There are varying levels of expertise 
among members. Several members arc pro- 
fessional programmers or electronics en- 
gineers. Some members arc new to both 
areas. A few members are constructing their 
own microcomputer systems at home or at 
work. Use of lest equipment and consulting 
is available on a limited basis. 

One function of the group is a stockpiling 
of pertinent information. A small reference 
library has been started, and items are 
available to all members for short term loan 
or copying. At present this includes several 
hobbyist magazines; detailed information on 
Intel 8080 systems, Motorola 6800 systems, 
and various interface and accessory units; a 
book of techniques for programming 8 bit 
micro systems; a programmed course in 
microcomputer architecture; and various 
works on writing editors, assemblers and 
compilers. Anyone with materials to con- 
tribute to this collection is encouraged to 
contact the group librarian, Larry Hughes. 

Another function of the group is to share 
information and techniques via seminars or 
tutorials. So far, topics have been pro- 
gramming an 8080 based system, reading a 



90 




New 




w&tmm 

Series 1750, 1751 
Display Mounting Hardware 



INSTALLED VIEWING Si 

SERIES 1750 



jjilg '" 



T 

1.000 
(25.40] 



INSTALLED VIEWING SCREEN - 

SERIES 1751 / 



/ 



~r 



Molded socket block accepts standard 7 segment LED read- 
outs with .3" row spacing. Pins are .65" long wire wrap 
type. Bezel and socket block are black molded plastic with 
viewing screen available in red, amber, or smoky neutral, 
circularly polarized for glare reduction. Unique mounting 
system is self fastening to panel cutout. Two sizes avail- 
able. 1750 series for use with up to .4" high readouts. 
1 751 series for use with up to 1" high readouts. 
IMPORTANT! Lost 2 digits of part numbers shown below' 
denotes number of readout positions, (specify screen color) 
1750-04... $7.00 1750-06... $9 .00 1750-08.. $11. 00 
1751-04. ..$7. 27 1751-06. ..$9.31 1751-08. .$11 .34 




MINIATURE ROCKER DIP SWITCHES 
Dual in-line SPST switch arrays for P.C. mounting. Spring 
loaded sliding ball contact system for positive, tease proof 
contact. Comes in contact arrangements from 4 to 10 per 
pack. Fits standard DIP sockets. Last two digits of stock 
number indicate number of switches. 

DIS-76-B04 $3.10 

DIS-76-B06............ $3.50 

DIS-76-B07 $3.75 

DIS-76-B08 $3.95 

DIS-76-B10 ...$4.35 



W.f 



IC SOCKETS - HIGHEST QUALITYI I 

PC Mount Solder Tail . 

Skt-0802..8pln..l0/$2.25lskt-1402..14pln..!0/$2.40 

Skt-1602..16pin.l0/$2.70lskt-1802..18pIn..l0/$4.25 

Slct-2202. .22 pln.lO/$5.5o|Sxt-2402. .24 pin. .10/$6.00 

WIRE WRAP TAILS 

Skt- 1400.. 14 pin. 10/$4.50|Skt-1600..16 pin..l0/$5.00- 



IM6100 CPU. Intertill' 12 Bit CMOS CPU chip 
Is the microprocessor which recognizes the 
famous PDP8/E Instruction set. Single 
power supply, 4-7V @ 400 mlcroomps. 

Now, a new low price 

Full data packet $4 




LM3I7 Voltage Regulator. 1 ,5A, 3 terminal adjustable 
regulator In TO-3 cat*. Ad|utts from + 1.2V to +37V. 
Complete overload protection. .1% load regulation, 
.01% A Una regulation. No need to stock assorted reg - 
ulotart- just stock retlttors $4.99 




MC 14412 UNIVERSAL MODEM CHIP 
MC14412 contains a complete FSK modulator and de-mod- 
ulator compatible with foreign and USA communications. 
(0-600 BPS) 
FEATURES: 

• On chip crystal oscillator 
.Echo suppressor disable tone generator 
.Originate and answer modes 
.Simplex, half-duplex, and full duplex operation 
.On chip sine wave 
.Modem self test mode 
.Selectable data rotes: 0-200 
0-300 
0-600 
.Single supply 

VDD=4.75 to 15VDC - FL suffix 
VDDM.75 to 6 VDC -VL suffix 
TYPICAL APPLICATIONS: 

.Standalone - low speed modems 

.Built - In low speed modems 

.Remote terminals, accouttlc couplers 

MC14412FL $28.99 

MC14412VL $21.74 

6 pages of data .60 



MCI 4411 Bit Rote Generator. Single chip far VI 
generating selectable frequencies for equipment Jp A 
In data communications such as TTY, printers, mL -gg j 
CRTs ormicroproceseort. Generates 14 dlf- (SAX J 
ferent standard bit rates which ore multiplied ^•ess^-' 
under external control to IX, 8X, 16Xor 64X Initial 
value. Operates from tingle +5V supply. 

4 pages of data 40$ 

Crytfol for the above $4.95 



go? of ossm 
Say* 




WHY EXPOSE YOUR BODY TO THE ELEMENTS? 
AVOID GETTING SOAKED BY HIGH PRICES 
AND MAILING FEES. SAVE TIME, MONEY, 
GAS AND COLD REMEDIES. BRIGHTEN 
YOUR DAY, SHOP THE TRI-TEK WAYIII 



ENTS?\ 
ICES J 

iNEY, \ 
UP J 



/* RC>1 

V GOLD CHIP 

Linear Integrated Circuits 

Brand new process by RCA in which the aluminum metallzatlon 
has been replaced by gold. The chip Is then hermetically seal- 
ed. What this means to you Is unprecedented reliability and 
uniformity. Plastic parts that mwt mil specs! I 
Tri-Tek Is proud to be the first to bring this new level of per- 
formance to you at SURPLUS PRICES. Why buy regrades??? 
CA301A. .Improved, general purpose op-amp, 8 pin dip . . 59$ 

CA307. ..Super 741 op-amp. 8 pin dip . .. 52$ 

CA324. . .Compensated quad op-amp, 14 pin dip $1 .80 

CA339A.. Low offset quad comparator. 14 pin dip.... $1.59 
CA741C. .Famous general pum<*>se op-omp, 8 pin dip .. . 45$ 
CA747C. .General purpose dual op-amp, 14 pin dip .... 82$ 

CA748C.. Externally compensated 741, 8 pin dip 49$ 

CA1458.. General purpose dual op-amp. 8 pin dip 69$ 

CA340l"..Quad,single supply (5-18V)op amp. 14 pin... 89$ 

Another super buy from RCA. CA555 timer. 8 pin dip ... 59$ 



8080A 

Improved performance version of the popular 8— bit mlcro- 
procettorby INTa $39.95 



NSL4944 LED. Current regulated, universal dlffuted-lera 
red LED lamp. A GaAsP solid-state high intensity LED 
encapsulated in a plastic package containing a current reg- 
ulating IC that provides constant intensity over a wide volt- 
age range. 2 to 18V, AC or DC. Use for indicator lamps, 
optical coupling, battery charging circuits, logic probes, 
almost any place you need a lamp. Long life, wide angle. 
No series resistor needed. Typical 13mA forward current. 
NSL4944 with panel mounting clip 89$ 



Miniature PC mount rotary twitches. Made by 
Spectral . Only 1/2" dla, 3/16" pint for PC 
mounting. Top screwdriver adjust. 
1 pole, six position, 69$, 1 pole, 10 position 98$ 



APRIL SPECIALS! 1 1 

MC7805, 5V, 1 A regulator, house numbered 99$ 

MK-20 TO-3 mounting kit 10/$2.50 

Bectrolytlc Cap. 500ufd, 50VDC 10/$2.17 

Miniature CTS PC pott, IK 12/ 97$ 

Ceramic Bate Pot arrays, assarted values 15/ 99$ 

24 Pin DIP socket, gold, solder tall leods 10/$3.88 

RTL Fllp-Flop TO-5 metal con. 10/..9?$ 

Transmitting Mica Capacitor .Olufd, 2.5KV... 5/.. 99$ 
Koll Kord. 4color cooed conductors. 4 feet.. 2/.. 99$ 
Midget Collapsable Antenna. 7" extended .... 3/. .99$ 
Heat Shrink Tubing 3/8"d!a X 2' long, black 4/. .99$ 

Ferrite Beads. l/B"Xl/8" dla 20/..99$ 

Computer Grade Cop..4000ufd/50V 2/J1.99 

100V, 3A epaxy diodes, full lead 25/$! .98 

1N4148 High speed signal diode (like 1N914).. 20/ $1.00 




tRi-tek, inc. 

6533 noBth 43110 avenue. 

qlentale. anizon* n soi 

phone oca - fs\-m*> 



Minimum order $10 US/$15 Foreign In US Fund.. All onsen pottage paid. 
Please add Inturonce. Matter Charge and tank America oarat welcome, 
($20 minimum .) Telephone ordert may be placed 1 1AM to 5PM dairy, Man 
thruFrl. Call 602-931 -6949. Check reader service card or tend trans 
far our lores) Hyert packed with new and turplut electronic < 



Is your organization list- 
ed here? Do you want to 
start a local club? BYTE 
wants to encourage the 
transfer of information to 
and among the practition- 
ers of the personal infor- 
mation systems art. If 
your club or organization 
is not mentioned here, be 
sure to put a member in 
charge of sending us the 
information on your activ- 
ities; if you 're interested in 
starting a club, tell us and 
we'll help out by printing 
your name and address. 



parallel ASCII keyboard, and using a cassette 
tape recorder for mass storage (data and/or 
programs). Anyone willing to conduct a 
session on any topic of interest lo the group 
is encouraged to contact the group program 
director (temporarily Larry Hughes). Some- 
one is needed to take on the role of program 
director. 

For further information on TACS, con- 
tact Larry Hughes, home phone 575-4471, 
work phone 644-2019, or write him al Rt 
14, Box 35 I -11 6, Tallahassee FL 32304. 

Meetings are held in Room 101, Love 
Building, Florida State University campus. 
Dates for future meetings: March 13, 27, 
April 10, 24, May 8, 22, June 5, 19, July 10. 

Oklahoma City Hobbyist Group 

Mike O'Dell, PO Box 2891, Norman OK 
73069, writes that he is trying to contact 
others in the Oklahoma City metropolitan 
area. He is with the Computer Science 
Department at the University of Oklahoma, 
and there is a nucleus of several individuals 
already involved in club activities. Anyone 
interested in this hobbyist group should 
contact Mike by mail or at (405)325-3866 
(ICS Department) or at home (seldom) 
(405)364-0615. 

Long Island Computer Club 

The Long Island club's first meeting was 
held in January, and the second meeting 
February 20. The algorithm for meeting 
days is tentatively the third Friday of every 
month; arrangements are being made for a 
regular meeting place. For details, write 
Jerry Harrison at 36 Irene Ln, East Plainview 
NY 11803; or phone (516)938-6769. 

New Orleans Club 

If you live in the metropolitan New 
Orleans area and arc interested in computers, 
you arc invited to join our group. Whether 
your interest is hardware, software, applica- 
tions, or just general interest, we welcome 
your input. For further details, please write 
or call: 

Emile Alline 

1119 Pennsylvania Av 

Slidell LA 70458 

(504)641-2360 

News From North Texas 

Bill Fuller forwarded BYTE the latest 
issue of the Computer Hobbyisl Group of 
North Texas Newsletter, dated January 
1976. For individuals in the Dallas and Fort 
Worth areas, this is the place where your 
gregarious qualities can be exercised. Con- 
tact Lannie Walker, president, at 



(818)244-1013; Neil Ferguson at 461-2867, 
Ric Martin at (214)387-1945, or Bill Fuller 
at 641-2909. The January issue included 
Harold Mauch's comments on interfacing 
older Teletypes to computers (eg: Model 14, 
15 and 19 devices with Baudot coding), 
comments on the 8080 versus 6800, short 
product reviews, short publications reviews, 
Mauch's notes on the provisional audio 
cassette interface standard (see his article in 
March BYTE), and the usual business stuff 
for which newsletters are famous. 

Cache Newsletter (Chicago Area) 

Cache's newsletter, Volume I Number 1, 
edited by Geoff Lowe, described the news- 
letter's goals. For individuals living in or near 
the Windy City, Cache is the central meeting 
place for hobbyists, holding sessions month- 
ly northwest of the city. The Cache mailing 
address is PO Box 36, Vernon Hills IL 
60061. 

One of the most exciting activities re- 
ported in the January newsletter was Arthur 
Kingsworth and Ken Short's demonstration 
of the new E & L Instruments MD-'I 
microdesign system. Mr Short is with SUNY- 
Slony Brook, and was scheduled lo discuss 
advanced digital design and 8080 related 
topics using the system; Mr Kingsworth 
talked about simple digital design. In phone 
conversation with William Prccht, a member 
of Cache, the presentation sounded extreme- 
ly valuable to small systems users. Such 
detailed nuts and bolls discussions by manu- 
facturers' representatives are a big plus to 
any club meeting. 

Beta lota Tau 

Larry Passo, secretary-treasurer of the 
new college fraternity Beta lota Tau sent 
BYTE a copy of the preliminary bylaws of 
the fraternity. For the record, here is the 
statement of purposes and goals taken from 
the preliminary version: 

"The purpose of Beta lota Tau is to 
provide an organization for college 
students interested in computer 
sciences. Beta lota Tau has as its goals 
the fostering of brotherhood among 
such students and the encouragement 
and support of computer related activ- 
ities and studies." 

The organization is in the process of 
preparing the final bylaws. They're of course 
helped out by keeping the entire text of the 
bylaws on a computer filing system so that 
changes can be made using the text editor 
program. 

Persons interested in the concept of a 



92 



college fraternity tor computer science 
should contact Beta lota Tau through: 

Richard A Petke, chairman 

Lawrence H Passo, secretary-treasurer 

RHITBox520 

Terre Haute IN 47803 

Eastern Ontario Club? 

Victor Vees, 342-Palace Rd, Kingston, 
Ontario, K7L 4T3, is interested in forming a 
computer club for the Ontario-Quebec area 
of Canada. He can be reached by phone at 
(613)546-2560. 

And, From Ottawa 

Larry Kayser, VE3QB/WA3ZIA, phoned 
BYTE recently, and described the trials and 
tribulations of computer hobbyists in 
Canada. He's interested in forming a club for 
the Ottawa region. Interested parties can 
contact him at (613)741-1640 or by mail at 
24 Arundel, Ottawa, Ontario, Canada. 

Right now, it looks as if the locally 
produced 8008 oriented products are still 
the most cost effective machines for Cana- 
dians. The reason? A total tariff approaching 
33%. (We don't know whether it's Washing- 
ton or Ottawa that causes the tariff, but it's 
a waste of global resources either way.) 




: ~WT CQ66ETTE 



ALTAIR 8800 AND IMSAI OWNERS: TALK TO 3 CASSETTE MACHINES (THANKS TO INDE 

PENDENT READ/WRITE) ^OR MASS STORAGE. USES THE INDUSTRY STANDARD BI 

PHASE RECORDING METHOD (SEE FEBRUARY '76 BYTE ) . THIS KIT IS 

SMART! Includes its own software and data buffers (512 bytes 

OF ROM AND 512 BYTES OF RAM) SO YOU CAN GET GOING AS SOON 
AS YOU CONNECT POWER. WHEN YOU ORDER, TELL US WHAT 



oP'p 



X 
E 

P 

ft 

A 
M 

\o 

ft 
b 



$79.95 



This kit is 
a basic 4K by 
8 RAM board (no 

buffers just stor-*^ 

age) . Plug- in com- 
patible with JOLT mi- 
crocomputer systems, 
or any others using a 
bi - directional data 
buss scheme. 
This kit is simple, 
inexpensive, and easy 
to build and apply. 
Sockets included for 
all ICs . Connects to 
your system with a 3M 
style, flat cable 40 
pin connector (not 
included with kit) 



STARTING ADDRESS 
SLICE AND WE'LL 
BOARD, SOCKETS, 



YOU'D LIKE FOR THE IK MEMORY 
TAKE IT FROM THERE. PARTS, 
AND PLUG-IN COMPATIBILITY. 




•0C 




(CAVE 



BOX 6194 
ALBANY, 
CA 94706 




TMS8080 
2502 Uart 



$27.95 
$3.75 



T 
6 



WE PAY P0STAGE--no CODi— C»l res 
add tax. Guarantee: full refund 
if not satisfied. By the way — 
even a i page ad can't tell you 
too much, so circle the reader 
service card, or send us an SASE 
for full product descriptions 



"7 have, a Viemendoui amount ol £un cA.eatU.ng 
theit ploducti and I'm happy to be able, to 
oileA them to you." — Ge.on.Qe. Uohjww 



COMING 2ND QUARTER— 16K 
byte ALTAIR 8800 compati- 
ble memory, for under 1/3 



COM 

it 

a 




continued from page 4 

the output drives for the yard switches and 
train speed control, as well as inputs of train 
position and other layout state information. 
If your computer is to control an electronic 
music system, then the custom peripherals 
of the application are the output devices 
which are used to generate the music and the 
interactive control inputs. If your computer 
is to act as a home monitor and burglar 
alarm system, then the custom peripherals 
are the intruder sensors and alarm or phone 
dialing outputs which receive the informa- 
tion about the security status of your 
property. 

Even if your system involves no custom 
hardware modules, there is always the 
customization of software, given a general 
purpose system. As soon as you have the 
system up and running, you'll begin to 
develop a personal library of programs and 
techniques of programming which will make 
your particular system of hardware plus 
mass storage files completely different from 
every other system in existence. By making a 
program to accomplish your specific pur- 
poses, you have made the system into a new 
entity which is different from another 
physically similar system owned by your 
technological neighbor. The personal library 



of your programming will build up on mass 
storage over time, further enhancing the 
uniqueness of your own efforts in personal 
computing. While you may trade programs 
with other individuals having similar sys- 
tems, the set of programs in your own 
library is likely to be completely unique 
with respect to any other person's library. 
This software uniqueness, which transcends 
the potential sameness of hardware is one 
final guarantee that every system ultimately 
becomes a personalized system if it is used at 
all. 

Enhancing The Options 

As described above, a major component 
of the psychological rewards of home brew 
computing is the personal uniqueness of the 
systems which are created by BYTE readers. 
This form of computing is a means of 
creating a personally unique hardware, 
software and skills combination according to 
your own tastes and desires. This is one of 
the more important personal rewards to be 
obtained, and is an obvious motivating 
factor for the people who get involved in the 
field. 

Thus one of the major issues of concern 
to manufacturers and users should be ways 
to enhance the number of options available 



Stamp Out Cybercrud 



COMPUTER 




Have you every been victimized by 
one of a myriad computer based inter- 
personal putdowns? In Ted Nelson's 
book, Computer Lib/Dream Machines, 
you'll find an excellent essay on the 
nature of this "cybercrud." 

Have you ever wondered where to go 
for a basic starting point in your quest 
for information about computer applica- 
tions and uses? Ted Nelson's book, 
Computer Lib/Dream Machines, is the 
place for you to begin. 

Computer Lib/Dream Machines is for 
the layman — the person who is intelli- 
gent and inquisitive about computers. It 
is written and self published by a 
philosopher who is also a self confessed 
computer fan and an excellent teacher of 
basic concepts. (For those who have not 
yet heard, ivory towers are constructed 
out of real and substantial white bricks.) 
The most important aspect of this book 



is its inspirational data content. The 
machines we're all busy working on are 
deep personal expressions, and not the 
cold and inhuman monsters of the tradi- 
tional stereotype. The book defines 
many of the terms and explains many of 
the techniques which can be used in the 
personal computer systems we're all 
busy constructing and programming. It 
performs this service in a way which 
adds color and excitement to this newest 
of art forms, the computer application. 

Computer Lib/Dream Machines is 
must reading for the beginner, and is also 
a refreshing self examination for the old 
hand at programming and systems work. 

You can order your copy of Com- 
puter Lib/Dream Machines from BYTE's 
Books for $7 postpaid. Send your order 
today to BYTE's Books, 70 Main St, 
Peterborough NH 03458. Help stamp 
out cybercrud. 



PETERBOROUGH, NH 03458 



Send 


copies of Computer Lib/Dream Machines to: 

Name 




Address 




City Stale Zip 




1 1 Check enclosed 

ii Rill MC.it Fvp Datp 




ll Rill RA * Fvp natp 
Signature 



94 



In spite of their sophistication, computers still have to be assembled from mundane nuts & bolts, resistors, caps, 
switches, lights, etc. We at Delta try to keep a good inventory of these small parts. This month we are featuring 
a sample of these items. We have over 1,000 items in our new 88 page catalog. Send for it-- it's free. 



LONG HANDLE TOGGLE SWITCHES 




Miniature toggle switches with %" long bat 
lie. Both are SPDT, PC contact, made by ALCO 
C&K. ALCO series MST 105 or C&K series 710x. With 
hardware. Really dresses up front panels, and easier to use. 
on-none-on STOCK NO. B6276 $1.25 each, 5/5.00 

on-off-on STOCK NO. B6277 $1.25 each, 5/5.00 



ROTARY SWITCHES 

CENTRALAB rotary switches, 
mounts in %" hole, phenolic 
base. 
1 section, 4 pole, 2 position STK. NO. B6222 
3 section, 3 pole, 11 position STK. NO. B6278 




.75 ea, 5/3.00 
$1.50ea, 4/5.00 



GENERAL PURPOSE LOCK 

Keep your valuable equipment locked up. 

This general purpose lock is very easy to use; 

mounts in %" dia hole, up to Yi" thick. The 

"hook" catches on any %" bolt. 180 throw. 

Complete with 2 keys. Extra keys .25 each. 

STOCK NO. B5384 $1.50/set, 4/5.00 




Arrow-Hart 



LOCKING SWITCH SPST 



A SPST lock switch made by Arrow— Hart. Useful as a main power 
switch, write protect switch, burglar alarm switch, etc. Mounts in 
%" hole. With key, mounting nut, and attractive beveled bezel. 
STOCK NO. B5294 $1.50 each, 4/5.00 




® 



MOTOROLA 
OPTICAL COUPLER 




COLLECTOR 



Optical coupler in a 6 pin mini- 

DIP. GaAs diode source, NPN 

phototransistor receiver. Because 
of their almost infinite isolation between input & output, optical 
couplers make ideal buffers. They can be used to control AC with 
TTL (through SCRs or triacs), switch high voltage with TTL, as 
line receivers, as interface circuits between logic families, etc. 
STOCK NO. B4524 $1.00 each, 6/5.00 



BRIDGE RECTIFIERS 



RATINGS 






PIV 


AMPS 


STOCK NO. 


PRICE 


50v 


1.0A 


B4136 


.50 ea 


50 


2.0 


B4404 


.75 


50 


6.0 


B4532 


2.00 


100 


2.0 


B4405 


1.00 


150 


1.5 


B4396 


1.00 


200 


1.0 


B4302 


1.00 


200 


2.0 


B4406 


1.50 


200 


25.0 


B4534 


4.00 


400 


1.0 


B4535 


1.25 



Ar5*l=| POTTER & BRUMFIELD 



R10-E1 SERIES INDUSTRIAL RELAYS 



W-r-V" 






POTTER & BRUMFIELD series R10 relays in 
clear plastic cases. Solder terminals, contacts 
rated at 2 amps. Listed with distributors for 
$3.65 to $4.90 each. 6 volt coils. 



R10-E1-Y4 
R10-E1-Y6 



52 ohm coil 4PDT 
25 ohm coil 6PDT 



STK. NO. B9395 
STK. NO. B9396 



$1 .50 ea 
$1.75 ea 



NUTS & BOLTS 

Here is a sample of some of the hardware that we stock. Other 
sizes and styles of screws are available. We also stock spacers, 
rubber grommets, terminal strips, barrier strips, sheet aluminum, 
plexiglass, heat sinks, PC edge connectors, and more. 

All Hardware $1.25 /package, 10pkg/$10. May be mixed. 



SIZE DESCRIPTION 



STK. NO. NO/PKG 



2-56 
4-40 
6-32 
6-32 
8-32 
10-32 



hex nut 

SS (stainless steel) hex nut 

hex nut 

SS hex nut 

SS hex nut 

hex nut 



B7207 
B7214 
B7008 
B7230 
B7218 
B7013 

B7268 
B7227 
B7225 
B7222 
B7045 
B7210 
B7226 
B7 047 

B7018 
B7269 
B7267 
B7352 

(The following screws all have binder or pan heads) 

4-40 7/32" long SS screw B7241 

4-40 5/16 long screw B7234 

4-40 5/8 long screw B7250 

4-40 3/4 SS screw B7204 

4-40 7/8 SS screw B7206 

4-40 1 1/4 long screw B7201 



no. 4 SS flat washer 

no. 4 SS split lock washer 

no. 6 SS flat washer 

no. 8 SS split lock washer 

no. 8 star lock washer 

no. 10SS flat washer 

no. 10SS split lock washer 

no. 10starlock washer 

3/8 x 32 volume control nut 
3/8 SS star lock washer 
3/8 flat washer, chrome plate 
3/8 aluminum flat washer 



6-32 1/2" long aluminum screw 

6-32 5/8 SS screw 

8-32 5/16 long screw 

8-32 3/8 long screw 

8-32 1/2 SS screw 

8-32 5/8 SS screw 

10-32 3/8" long screw 



B7233 
B7203 
B7056 
B7004 
B7217 
B7209 
B7122 



125 

100 

100 

90 

75 

75 

150 

125 

125 

90 

100 

90 

75 

90 

75 
75 
75 
75 



125 

150 

125 

75 

75 

75 

90 
75 
90 
90 
75 
75 
75 



GRAB BAGS 

Unlike most places, our grab bags are not "floor sweepings. " 
Rather, we offer the same high quality merchandise as in our 
catalog. We attempt to provide a good variety in each bag. 



® 



DISC CAPACITOR GRAB BAG. Values from a few pf to .2 mfd 
and voltages from 12v to 1 Kv. Marked, most with long leads. 
STOCK NO. B2547 % lb., 100 to 250 pieces $2.00 ea, 3/5.00 



TERMINAL STRIP GRAB BAG. An assortment of 25 pieces, 

from 1 to 6 terminals, with and without ground lugs. 

STOCK NO. B6143 Package of 25 $1 .00 ea, 6/5.00 




'/2 WATT RESISTOR GRAB BAG. An assortment of % watt 
resistors on rolls, mostly 10%. Also a few 5% resistors, small diodes, 
rectifier diodes, zeners, & tantalum caps. 250 to 350 parts. 
STOCK NO. B8361 % lb., 250 parts min. $2.00 ea, 3/5.00 

POWER RESISTOR GRAB BAG. An assortment of 4 & 5 watt 
power resistors. STOCK NO. B8765 10 for $1.00, 50 for $3.50 

RELAY GRAB BAG. An assortment of 1 relays, various coil 
voltages, both AC & DC, and various contact arrangements. Most 
are in original boxes. List price $3 to $20 each. 3 lbs. 
STOCK NO. B9439 10 assorted relays $5.00,20/9.00 

ELECTROLYTIC CAPACITOR GRAB BAG. 12 assorted 
electrolytics, from 5 mfd to 2500 mfd. Voltages from 5v to 450v. 
STOCK NO. B2457 8 lbs. 12 for $3.00, 36 for 7.50 



DELTA ELECTRONICS CO. 

BOX 1, LYNN, MASSACHUSETTS 01903 
Prion. (617) 388-4705 



MINIMUM ORDER $5.00. Include sufficient postage, excess 
refunded. Send for new 88 page Catalog 16, bigger than ever. 

WBSOm BANKAMERICARD and MASTERCHARGE 
JJJJJJJ now accepted, minimum charge $15.00. Please 

BBHM Include all numbers. Prione orders accepted. 



BVTE 



reader 
service 



To get further information on the products advertised in BYTE, fill out the reader 
service card with your name and address. Then circle the appropriate numbers for the 
advertisers you select from this list. Add a 9 cent stamp to the card, then drop it in the 
mail. Not only do you gain information, but our advertisers are encouraged to use the 
marketplace provided by BYTE. This helps us bring you a bigger BYTE. 



A39 


Advanced Data Sciences 62 


A18 


Meshna 87 




BYTE's Books 86, 94 


A57 


Mikos 79 




BYTE Subscription 88 


A20 


Mikra-D 71 


A37 


Celdat 84 


A21 


MITS CIV, 9, 13 


A43 


Centi-Byte 74 


A62 


Morrow 93 


A6 


Continental Specialties 17 


A61 


MOS Technology 15 


A41 


Cromemco 7 


A22 


National Multiplex 54 


A7 


Delta 95 


A64 


Oliver Audio 93 


A8 


Dutronics 71 


A63 


Parasitic Engineering 75 


A58 


EBKA 33 


A23 


Polymorphic Systems 73 


A56 


E&L Instruments 41 


A24 


Processor Technology 48,49 


A68 


ESSI 75 


A26 


Scelbi 19 


A9 


Godbout 85 


A27 


S D Sales 63 


A65 


H Square Digital 47 


A59 


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A12 


IMS Clll 


A29 


Southwest Technical Products CI I 


A38 


Intelligent Systems 47 


A30 


Sphere 5 


A60 


Interface 82 


A32 


Tri Tek 91 


A15 


James 89 


A34 


Wave Mate 11 


A17 


Matrix 1 







BLJIvI B '. BYTE's Ongoing Monitor Box 

BYTE would like to know how readers evaluate the efforts of the authors 
whose blood, sweat, twisted typewriter keys, smoking ICs and esoteric software 
abstractions are reflected in these pages. BYTE will pay a $50 bonus to the author 
who receives the most points in this survey each month. 

• Articles you like most get 10 points, articles you like least get (or 
negative) points - with intermediate values according to your personal scale of 
preferences, integers only. 

• Only one entry per reader. 



Page 

No. Article 

16 Crayne: Programming the Implementation 

20 Fox: Biorhythm for Computers 

24 Nelson: Magic of Computer Languages 

28 Lancaster: One Layer Printed Circuits 

34 P. Helmers: Aargh! 

36 Flippin: SR-52: Another World's Smallest 

42 Bosen: Controlling External Devices 

46 Cotton: Interface an ASCII Keyboard 

50 Murray: Frankenstein Emulation 

56 Wier-Brown: Design an On Line Debugger 

64 Baker: Update: Tl TMS9900 

80 Thompson: Mini Wire Wrap 



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January BOMB Results 

The leader in BOMB voting for the 
January 1976 BYTE was James Luscher, 
who receives the $50 bonus check for his 
article "Taking Advantage of Memory 
Address Space." Runners up were Sumner 
Loomis' "Let There Be Light Pens" and Jim 
Hogenson's "CT-1024 Kit Review." 



to personal computing enthusiasts. One item 
which might be considered is the standard- 
ization of certain hardware interconnection 
schemes at the plug level. What I have in 
mind is the creation of (for example) an 8 
bit bidirectional IO bus plug with control 
signals and timing strobes. With such a plug 
definition, a number of modular additions 
could be made independent of backplane 
physical and electrical considerations simply 
by plugging the peripheral into the standard 
socket. For numerous low speed peripherals, 
such an adapter plug for programmed IO 
would be ideal. I'll list a few: 

° Modular electronic musical instruments 
Low speed tape interfaces with 

UART serial to parallel conversion 
° Digital multimeters 
Frequency counters 
° Burglar and fire alarm inputs or outputs 
High fidelity system signal routing control 



The idea is to achieve a standard for 
non-DMA programmed IO plug interfaces 
which could be provided as multiple plugs 
on an appropriate card coming with any 
given brand X computer. Then the manufac- 
turers of systems for specific applications 
could make a "plug compatible" product for 
this standard which could be used with any 
of the processors on the market. Is there a 
need for such a standard? I think so, from 
the argument that the larger the number of 
options people have available, the larger will 
be the whole field of personal computing. 
Last November, BYTE organized a confer- 
ence of the manufacturers and users in our 
infant field to discuss an audio tape 
recording standard. A productive result of 
this conference was the provisional standard 
described in February and March BYTEs. 
For the same reasons, it would be good to 
get the manufacturers and users together to 
talk about the possibility of such a 
programmed IO plug compatibility standard 
which will help expand the utility and 
generality of these small scale systems 
products. 

I'd like to see what interest there is from 
manufacturers and users in achieving for the 
personal computing field the logical equiva- 
lent of high fidelity's RCA style phono plug. 
I think there should be enough interest to 
justify a working meeting next fall on the 
subject. The meeting will be modelled on 
last fall's working meeting concerning audio 
cassette recording standards. I invite corres- 
pondence from manufacturers and users who 
have something to contribute to the 
organization and definition of such a 
standard. ■ 



96 




n © 



COMMERCIAL GRADE COMPUTER - PRICED FOR THE INDIVIDUAL KIT BUILDER 




QUALITY FEATURES INCLUDE: 
A commercial grade cabinet, made of heavy gauge aluminum, custom designed for this specific product. Rack mounting is optional. 
Lucite display panel with a photographically reproduced legend and LED display mask. In addition to standard lights and switches, the heavy 

duty front panel has an extra 8 program controlled LED's. 
Rugged commercial grade paddle switches backed up by reliable debouncing circuits. 
Gold plated contacts on board edge connectors to assure corrosion free contact at all locations. 
A heavy duty power supply to handle lots of extra cards, the power supply delivers up to 20 amperes at 8 volts, and 3 amps each at +16 and -16 

volts. A 30 ampere supply is optional. 
A sturdy card cage to properly support up to 22 printed circuit boards. 
Plug removable front panel board that eliminates the normal wiring harness between front panel and back plane. For special dedicated uses, the 

front panel board may be removed from the unit. 
A full line of peripheral devices to build truly powerful and complete systems. 
An exclusive shared memory facility from the company that pioneered shared memory microprocessing. Shared memory facilities allow 

multiple microprocessors in the same cabinet to share the same memory, yet run different programs in parallel with each other. 
A full compliment of board options. 

BASIC COMPUTER INCLUDES: 8080A Processor Board, Front Panel Control uuard, lights and switches, power supply. Expander 

Board, Cabinet . . . and . . . Software (Assembler, Monitor, Text Editor, Loader and 4K BASIC). 

PRICES: KIT . ..$499 ASSEMBLED ... $931 4K RAM KIT.. .$165 ASSEMBLED ... $299 

OPTIONS: Rack mount, RAM & PROM boards. Parallel & Serial I/O Boards, an 8 level Priority Interrupt/Clock Board, Shared Memory 

Boards, Interface Boards. 
PERIPHERALS: Floppy Disk Drives, 80 Column/300 LPM Printer, 50 Megabyte Disk Drive, 30 character per second Printer with Plotting 

Mode. 
TERMS: Check or Money Order, Bankamericard, Master Charge, 25% deposit on COD orders. On all orders under $1,000, add 5% for 

handling. California residents add 6% tax. 

SEND FOR FREE CATALOG OF IMSAI MICROCOMPUTER PRODUCTS - DEALER INQUIRIES INVITED 

SPECIAL NOTICE TO ALTAIR 8800 OWNERS 
If you would like to step-up to the superior quality of an IMSAI a080, you will be pleased to know that your ALTAIR 8800 boards are "plug- 
in" usable— without modification— in the IMSAI 8080 cabinet. Furthermore, by acquiring IMSAI 's unique Memory Sharing Facility, your 
ALTAIR MPU Board and IMSAI MPU Board can co-exist in the same cabinet, operate in parallel with each other, and share all memory in com- 
mon. This is the technology thai laid the foundation for IMSAI's powerful HYPERCUBE Computer and Intelligent Disk systems (recently 
featured in Computerworld, Datamation and Electronics magazines.) 



IMS ASSOCIATES, INC., 1922 REPUBLIC AVENUE, SAN LEANDRO, CA 94577 

(415) 483-2093 



Tke MITS Altair 8800 




ts showing up in some or 

the most unusual places.)